<?xml version="1.0" encoding="utf-8"?><!DOCTYPE article  PUBLIC '-//OASIS//DTD DocBook XML V4.4//EN'  'http://www.docbook.org/xml/4.4/docbookx.dtd'><article><articleinfo><title>IntroduccionArquitecturaARM</title></articleinfo><section><title>Introducción a la Arquitectura ARM</title><section><title>Estructura Básica de una Computadora</title></section><section><title>Buses - Arquitectura de Buses</title><para>¿Qué es un bus? </para><para>Es el medio de comunicación que utilizan los diferentes componentes del procesador para intercambiar información entre sí, eventualmente los buses o una parte de ellos estarán reflejados en los pines del encapsulado del procesador. </para><para>Dentro de un bus se distinguen 3 canales: </para><itemizedlist><listitem><para>Dirección: Se utiliza para seleccionar al dispositivo con el cual se quiere trabajar o en el caso de las memorias, seleccionar el dato que se desea leer o escribir. </para></listitem><listitem><para>Datos </para></listitem><listitem><para>Control: Se utiliza para gestionar los distintos procesos de escritura lectura y controlar la operación de los dispositivos del sistema. </para></listitem></itemizedlist><para>Von Neumann [de Wikipedia: <ulink url="http://en.wikipedia.org/wiki/Von_Neumann_architecture"/> ]  </para><para>The von Neumann architecture is a design model for a stored-program digital computer that uses a processing unit and a single separate storage structure to hold both instructions and data. </para><para>Harvard [de Wikipedia: <ulink url="http://en.wikipedia.org/wiki/Harvard_architecture"/> ]  </para><para>The Harvard architecture is a computer architecture with physically separate storage and signal pathways for instructions and data. </para></section><section><title>Mapa de Memoria</title><para>¿Qué es el mapa de memoria? </para><para>Tal vez más correctamente denominado espacio de direcciones de la CPU. Comprende el conjunto de todas las diferentes direcciones que puede generar la CPU. </para></section><section><title>Registros</title><para>¿Qué es un registro? </para><para>Es un espacio de memoria reducido, en general del tamaño de una palabra (según la arquitectura puede ser 8,16,32... bits) que utiliza la CPU para mantener una copia temporal de los datos que está procesando.  </para><para>Existe otra categoría de registros, llamados registros de configuración, cuyos bits se utilizan para controlar el comportamiento de algún elemento o periférico del sistema. </para></section><section><title>Instrucciones</title><para>¿Qué son las instrucciones? </para><para>Las instrucciones son el conjunto de operaciones que puede realizar la CPU para operar con los datos o controlar el sistema. </para></section><section><title>CISC - RISC</title><para>De ARM Architecture Reference Manual (A1.1) </para><para>The ARM is a Reduced Instruction Set Computer (RISC), as it incorporates these typical RISC architecture features:  </para><itemizedlist><listitem><para>a large uniform register file </para></listitem><listitem><para>a load/store architecture, where data-processing operations only operate on register contents, not directly on memory contents  </para></listitem><listitem><para>simple addressing modes, with all load/store addresses being determined from register contents and instruction fields only </para></listitem><listitem><para>uniform and fixed-length instruction fields, to simplify instruction decode. </para></listitem></itemizedlist><para>In addition, the ARM architecture provides: </para><itemizedlist><listitem><para>control over both the Arithmetic Logic Unit (ALU) and shifter in most data-processing instructions to maximize the use of an ALU and a shifter </para></listitem><listitem><para>auto-increment and auto-decrement addressing modes to optimize program loops </para></listitem><listitem><para>Load and Store Multiple instructions to maximize data throughput </para></listitem><listitem><para>conditional execution of almost all instructions to maximize execution throughput. </para></listitem></itemizedlist><para>El !ARM7TDMI-S Technical Reference Manual dice del microprocesador: (1.1) </para><para>The ARM architecture is based on Reduced Instruction Set Computer (RISC) principles. The RISC instruction set, and related decode mechanism are much simpler than those of Complex Instruction Set Computer (CISC) designs. This simplicity gives: </para><itemizedlist><listitem><para>a high instruction throughput </para></listitem><listitem><para>an excellent real-time interrupt response </para></listitem><listitem><para>a small, cost-effective, processor macrocell. </para></listitem></itemizedlist></section><section><title>Excepciones:</title><para>¿Qué es una excepción? Son sucesos inesperados o asincrónicos que alteran el flujo del programa.  </para></section><section><title>Breve Reseña Histórica</title></section><section><title>Familias de núcleos ARM</title><para>There are currently eight product families which make up the ARM processor range: </para><itemizedlist><listitem><para>Cortex Processor Family  </para></listitem><listitem><para><ulink url="http://www.arm.com/products/CPUs/families/ARM7Family.html">ARM7 processor family</ulink> </para></listitem><listitem><para>ARM9 processor family </para></listitem><listitem><para>!ARM9E processor family </para></listitem><listitem><para>!ARM10E processor family </para></listitem><listitem><para>ARM11 processor family </para></listitem><listitem><para>SecurCore processor family </para></listitem></itemizedlist><para>Further implementations of the ARM architecture are available from our Partners such as the Intel® XScale microarchitecture </para><para>The ARM7 processor family includes the following processors : </para><itemizedlist><listitem><para>!ARM7TDMI </para></listitem><listitem><para>!ARM7TDMI-S </para></listitem><listitem><para>!ARM7EJ-S </para></listitem></itemizedlist><para>The ARM7 processors are the most widely shipped processors in the world and the licensees include  </para><informaltable><tgroup cols="3"><colspec colname="col_0"/><colspec colname="col_1"/><colspec colname="col_2"/><tbody><row rowsep="1"><entry colsep="1" rowsep="1"><para>   Accent   </para></entry><entry colsep="1" rowsep="1"><para>   Infineon Technologies   </para></entry><entry colsep="1" rowsep="1"><para>   Qualcomm   </para></entry></row><row rowsep="1"><entry colsep="1" rowsep="1"><para>   AMI Semiconductor   </para></entry><entry colsep="1" rowsep="1"><para>   Intel Corporation Intellon Corporation   </para></entry><entry colsep="1" rowsep="1"><para>   Rohm   </para></entry></row><row rowsep="1"><entry colsep="1" rowsep="1"><para>   Analog Devices Inc.   </para></entry><entry colsep="1" rowsep="1"><para>   Intrinsix Corporation   </para></entry><entry colsep="1" rowsep="1"><para>   Samsung Electronics   </para></entry></row><row rowsep="1"><entry colsep="1" rowsep="1"><para>   Atmel Corporation   </para></entry><entry colsep="1" rowsep="1"><para>   iSine   </para></entry><entry colsep="1" rowsep="1"><para>   Sanyo   </para></entry></row><row rowsep="1"><entry colsep="1" rowsep="1"><para>   Broadcom Corporation   </para></entry><entry colsep="1" rowsep="1"><para>   Industrial Tech Research Institute   </para></entry><entry colsep="1" rowsep="1"><para>   Seiko Epson   </para></entry></row><row rowsep="1"><entry colsep="1" rowsep="1"><para>   Canadian Micro Corporation   </para></entry><entry colsep="1" rowsep="1"><para>   Kawasaki Microelectronics   </para></entry><entry colsep="1" rowsep="1"><para>   Shanghai Fudan    </para></entry></row><row rowsep="1"><entry colsep="1" rowsep="1"><para>   Chartered Semiconductor   </para></entry><entry colsep="1" rowsep="1"><para>   LSI Logic   </para></entry><entry colsep="1" rowsep="1"><para>   Shanghai Intergrated Circuit Research Center (ICC)   </para></entry></row><row rowsep="1"><entry colsep="1" rowsep="1"><para>   Cirrus Logic    </para></entry><entry colsep="1" rowsep="1"><para>   Matsushita   </para></entry><entry colsep="1" rowsep="1"><para>   Sharp   </para></entry></row><row rowsep="1"><entry colsep="1" rowsep="1"><para>   Conexant Systems Inc.   </para></entry><entry colsep="1" rowsep="1"><para>   Mediatek   </para></entry><entry colsep="1" rowsep="1"><para>   Shenzhen State Microelectronics (SMIT)   </para></entry></row><row rowsep="1"><entry colsep="1" rowsep="1"><para>   Dialog Semiconductor    </para></entry><entry colsep="1" rowsep="1"><para>   Micronas   </para></entry><entry colsep="1" rowsep="1"><para>   SiRF Technology   </para></entry></row><row rowsep="1"><entry colsep="1" rowsep="1"><para>   DSPG    </para></entry><entry colsep="1" rowsep="1"><para>   National Asic CRC (SEU)   </para></entry><entry colsep="1" rowsep="1"><para>   Silicon Integrated Systems Corp.   </para></entry></row><row rowsep="1"><entry colsep="1" rowsep="1"><para>   eSilicon Corporation   </para></entry><entry colsep="1" rowsep="1"><para>   NEC Electronics   </para></entry><entry colsep="1" rowsep="1"><para>   Skyworks   </para></entry></row><row rowsep="1"><entry colsep="1" rowsep="1"><para>   Flextronics   </para></entry><entry colsep="1" rowsep="1"><para>   Neo Magic Corporation   </para></entry><entry colsep="1" rowsep="1"><para>   SMIC Corporation   </para></entry></row><row rowsep="1"><entry colsep="1" rowsep="1"><para>   Freescale Semiconductor   </para></entry><entry colsep="1" rowsep="1"><para>   nVIDIA   </para></entry><entry colsep="1" rowsep="1"><para>   Socle Technology Corp   </para></entry></row><row rowsep="1"><entry colsep="1" rowsep="1"><para>   Fujitsu   </para></entry><entry colsep="1" rowsep="1"><para>   NXP   </para></entry><entry colsep="1" rowsep="1"><para>   Sony   </para></entry></row><row rowsep="1"><entry colsep="1" rowsep="1"><para>   Global Unichip Corporation   </para></entry><entry colsep="1" rowsep="1"><para>   OKI   </para></entry><entry colsep="1" rowsep="1"><para>   Spreadtrum Communications Inc .   </para></entry></row><row rowsep="1"><entry colsep="1" rowsep="1"><para>   Hong Kong Science and Technology Parks   </para></entry><entry colsep="1" rowsep="1"><para>   Oxford Semiconductor   </para></entry></row><row rowsep="1"><entry colsep="1" rowsep="1"><para>   Huawei Technologies   </para></entry><entry colsep="1" rowsep="1"><para>   Pixim   </para></entry><entry colsep="1" rowsep="1"><para>   STMicroelectronics   </para></entry></row><row rowsep="1"><entry colsep="1" rowsep="1"><para>   INDILINX   </para></entry><entry colsep="1" rowsep="1"><para>   Phoenix Microelectronics   </para></entry><entry colsep="1" rowsep="1"><para>   Texas Instruments   </para></entry></row><row rowsep="1"><entry colsep="1" rowsep="1"><para>   Toshiba   </para></entry><entry colsep="1" rowsep="1"><para>   UMC   </para></entry><entry colsep="1" rowsep="1"><para>   Verisilicon   </para></entry></row><row rowsep="1"><entry colsep="1" rowsep="1"><para>   Via Telecom/Via Technology   </para></entry><entry colsep="1" rowsep="1"><para>   Winbond Electronics Corp.   </para></entry><entry colsep="1" rowsep="1"><para>   Xi'an Huaxun   </para></entry></row><row rowsep="1"><entry colsep="1" rowsep="1"><para>   Yamaha Corporation   </para></entry><entry colsep="1" rowsep="1"><para>   Zarlink Semiconductor   </para></entry><entry colsep="1" rowsep="1"><para>   Zoran Corporation   </para></entry></row></tbody></tgroup></informaltable></section><section><title>Registros de la CPU !ARM7TDMI-S</title><para>The ARM processor has a total of 37 registers: </para><itemizedlist><listitem><para>Thirty-one general-purpose registers, including a program counter. These registers are 32 bits wide and are described in General-purpose registers on page A2-6. </para></listitem><listitem><para>Six status registers. These registers are also 32 bits wide, but only some of the 32 bits are allocated or need to be implemented. The subset depends on the architecture variant supported. </para></listitem></itemizedlist><para>Registers are arranged in partially overlapping banks, with the current processor mode controlling which bank is available, as shown in Figure A2-1 on page A2-5. At any time, 15 general-purpose registers (R0 to R14), one or two status registers, and the program counter are visible. Each column of Figure A2-1 on page A2-5 shows which general-purpose and status registers are visible in the indicated processor mode. </para><para><inlinemediaobject><imageobject><imagedata depth="'482'" fileref="https://ciii.frc.utn.edu.ar/TecnicasDigitalesII/IntroduccionArquitecturaARM?action=AttachFile&amp;do=get&amp;target=registrosARM7.png" width="'458'"/></imageobject><textobject><phrase>&quot;registrosARM7.png&quot;</phrase></textobject></inlinemediaobject> </para></section><section><title>Instrucciones !ARM7TDMI-S</title><para>The ARM instruction set can be divided into six broad classes of instruction: (ARM Architecture Reference Manual A1.2) </para><itemizedlist><listitem><para><ulink url="https://ciii.frc.utn.edu.ar/TecnicasDigitalesII/IntroduccionArquitecturaARM/TecnicasDigitalesII/ASMIntroduccionARM#Instrucciones_de_Salto">Branch instructions</ulink> </para></listitem><listitem><para><ulink url="https://ciii.frc.utn.edu.ar/TecnicasDigitalesII/IntroduccionArquitecturaARM/TecnicasDigitalesII/ASMIntroduccionARM#Instrucciones_de_Procesamiento_d">Data-processing instructions</ulink> </para></listitem><listitem><para><ulink url="https://ciii.frc.utn.edu.ar/TecnicasDigitalesII/IntroduccionArquitecturaARM/TecnicasDigitalesII/ASMIntroduccionARM#Instrucciones_de_transferencias">Status register transfer instructions</ulink> </para></listitem><listitem><para><ulink url="https://ciii.frc.utn.edu.ar/TecnicasDigitalesII/IntroduccionArquitecturaARM/TecnicasDigitalesII/ASMIntroduccionARM#Instrucciones_de_Carga_y_escritu">Load and store instructions</ulink> </para></listitem><listitem><para>Coprocessor instructions  </para></listitem><listitem><para><ulink url="https://ciii.frc.utn.edu.ar/TecnicasDigitalesII/IntroduccionArquitecturaARM/TecnicasDigitalesII/ASMIntroduccionARM#Instrucciones_para_la_generaci_n">Exception-generating instructions</ulink> </para></listitem></itemizedlist></section><section><title>Microcontroladores con Núcleos ARM</title><para>¿Qué es un microcontrolador? </para><para>Un microcontrolador es en sí mismo una computadora, posee los bloques escenciales que definen estos elementos, CPU, Memoria y Unidades de Entrada-Salida. Lo diferencia de una PC de escritorio u otras clases de computadoras el hecho de que todos estos elementos se encuentran fundidos sobre la misma oblea de silicio y contenidos en un mismo encapsulado. </para></section><section><title>Microcontrolador LPC2114</title><itemizedlist><listitem override="none"><para><inlinemediaobject><imageobject><imagedata depth="'710'" fileref="https://ciii.frc.utn.edu.ar/TecnicasDigitalesII/IntroduccionArquitecturaARM?action=AttachFile&amp;do=get&amp;target=bloquesLPC2114.png" width="'630'"/></imageobject><textobject><phrase>&quot;bloquesLPC2114.png&quot;</phrase></textobject></inlinemediaobject> </para></listitem></itemizedlist></section></section></article>