LPCOpen Platform for LPC18XX/43XX microcontrollers  18XX43XX
LPCOpen Platform for the NXP LPC18XX/43XX family of Microcontrollers
Macros
CHIP: LPC43xx Cortex CMSIS definitions

Detailed Description

Macros

#define __CM4_REV   0x0001
 
#define __MPU_PRESENT   1
 
#define __NVIC_PRIO_BITS   3
 
#define __Vendor_SysTickConfig   0
 
#define __FPU_PRESENT   1
 

Macro Definition Documentation

#define __CM4_REV   0x0001

Cortex-M4 Core Revision

Definition at line 67 of file cmsis_43xx.h.

#define __FPU_PRESENT   1

FPU present or not

Definition at line 71 of file cmsis_43xx.h.

#define __MPU_PRESENT   1

MPU present or not

Definition at line 68 of file cmsis_43xx.h.

#define __NVIC_PRIO_BITS   3

Number of Bits used for Priority Levels

Definition at line 69 of file cmsis_43xx.h.

#define __Vendor_SysTickConfig   0

Set to 1 if different SysTick Config is used

Definition at line 70 of file cmsis_43xx.h.