LPCOpen Platform for LPC18XX/43XX microcontrollers  18XX43XX
LPCOpen Platform for the NXP LPC18XX/43XX family of Microcontrollers
adc_18xx_43xx.h
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1 /*
2  * @brief LPC18xx/43xx A/D conversion driver
3  *
4  * @note
5  * Copyright(C) NXP Semiconductors, 2012
6  * All rights reserved.
7  *
8  * @par
9  * Software that is described herein is for illustrative purposes only
10  * which provides customers with programming information regarding the
11  * LPC products. This software is supplied "AS IS" without any warranties of
12  * any kind, and NXP Semiconductors and its licensor disclaim any and
13  * all warranties, express or implied, including all implied warranties of
14  * merchantability, fitness for a particular purpose and non-infringement of
15  * intellectual property rights. NXP Semiconductors assumes no responsibility
16  * or liability for the use of the software, conveys no license or rights under any
17  * patent, copyright, mask work right, or any other intellectual property rights in
18  * or to any products. NXP Semiconductors reserves the right to make changes
19  * in the software without notification. NXP Semiconductors also makes no
20  * representation or warranty that such application will be suitable for the
21  * specified use without further testing or modification.
22  *
23  * @par
24  * Permission to use, copy, modify, and distribute this software and its
25  * documentation is hereby granted, under NXP Semiconductors' and its
26  * licensor's relevant copyrights in the software, without fee, provided that it
27  * is used in conjunction with NXP Semiconductors microcontrollers. This
28  * copyright, permission, and disclaimer notice must appear in all copies of
29  * this code.
30  */
31 
32 #ifndef __ADC_18XX_43XX_H_
33 #define __ADC_18XX_43XX_H_
34 
35 #ifdef __cplusplus
36 extern "C" {
37 #endif
38 
44 #define ADC_ACC_10BITS
45 
46 #define ADC_MAX_SAMPLE_RATE 400000
47 
51 typedef struct {
52  __IO uint32_t CR;
53  __I uint32_t GDR;
54  __I uint32_t RESERVED0;
55  __IO uint32_t INTEN;
56  __I uint32_t DR[8];
57  __I uint32_t STAT;
58 } LPC_ADC_T;
59 
64 #define ADC_DR_RESULT(n) ((((n) >> 6) & 0x3FF))
65 #define ADC_CR_BITACC(n) ((((n) & 0x7) << 17))
66 #define ADC_DR_DONE(n) (((n) >> 31))
67 #define ADC_DR_OVERRUN(n) ((((n) >> 30) & (1UL)))
68 #define ADC_CR_CH_SEL(n) ((1UL << (n)))
69 #define ADC_CR_CLKDIV(n) ((((n) & 0xFF) << 8))
70 #define ADC_CR_BURST ((1UL << 16))
71 #define ADC_CR_PDN ((1UL << 21))
72 #define ADC_CR_START_MASK ((7UL << 24))
73 #define ADC_CR_START_MODE_SEL(SEL) ((SEL << 24))
74 #define ADC_CR_START_NOW ((1UL << 24))
75 #define ADC_CR_START_CTOUT15 ((2UL << 24))
76 #define ADC_CR_START_CTOUT8 ((3UL << 24))
77 #define ADC_CR_START_ADCTRIG0 ((4UL << 24))
78 #define ADC_CR_START_ADCTRIG1 ((5UL << 24))
79 #define ADC_CR_START_MCOA2 ((6UL << 24))
80 #define ADC_CR_EDGE ((1UL << 27))
81 #define ADC_SAMPLE_RATE_CONFIG_MASK (ADC_CR_CLKDIV(0xFF) | ADC_CR_BITACC(0x07))
82 
86 typedef enum IP_ADC_STATUS {
90 } ADC_STATUS_T;
91 
93 typedef enum CHIP_ADC_CHANNEL {
94  ADC_CH0 = 0,
102 } ADC_CHANNEL_T;
103 
105 typedef enum CHIP_ADC_RESOLUTION {
115 
117 typedef enum CHIP_ADC_EDGE_CFG {
121 
123 typedef enum CHIP_ADC_START_MODE {
132 
134 typedef struct {
135  uint32_t adcRate;
136  uint8_t bitsAccuracy;
137  bool burstMode;
139 
147 void Chip_ADC_Init(LPC_ADC_T *pADC, ADC_CLOCK_SETUP_T *ADCSetup);
148 
154 void Chip_ADC_DeInit(LPC_ADC_T *pADC);
155 
163 Status Chip_ADC_ReadValue(LPC_ADC_T *pADC, uint8_t channel, uint16_t *data);
164 
172 Status Chip_ADC_ReadByte(LPC_ADC_T *pADC, ADC_CHANNEL_T channel, uint8_t *data);
173 
181 FlagStatus Chip_ADC_ReadStatus(LPC_ADC_T *pADC, uint8_t channel, uint32_t StatusType);
182 
190 void Chip_ADC_Int_SetChannelCmd(LPC_ADC_T *pADC, uint8_t channel, FunctionalState NewState);
191 
199 {
200  Chip_ADC_Int_SetChannelCmd(pADC, 8, NewState);
201 }
202 
219 void Chip_ADC_SetStartMode(LPC_ADC_T *pADC, ADC_START_MODE_T mode, ADC_EDGE_CFG_T EdgeOption);
220 
228 void Chip_ADC_SetSampleRate(LPC_ADC_T *pADC, ADC_CLOCK_SETUP_T *ADCSetup, uint32_t rate);
229 
237 void Chip_ADC_SetResolution(LPC_ADC_T *pADC, ADC_CLOCK_SETUP_T *ADCSetup, ADC_RESOLUTION_T resolution);
238 
248 void Chip_ADC_EnableChannel(LPC_ADC_T *pADC, ADC_CHANNEL_T channel, FunctionalState NewState);
249 
258 void Chip_ADC_SetBurstCmd(LPC_ADC_T *pADC, FunctionalState NewState);
259 
264 #ifdef __cplusplus
265 }
266 #endif
267 
268 #endif /* __ADC_18XX_43XX_H_ */