LPCOpen Platform for LPC18XX/43XX microcontrollers  18XX43XX
LPCOpen Platform for the NXP LPC18XX/43XX family of Microcontrollers
Data Structures | Modules | Macros | Enumerations | Functions
CHIP: LPC18xx/43xx High speed ADC driver

Detailed Description

Data Structures

struct  HSADCINTCTRL_T
 High speed ADC interrupt control structure. More...
 
struct  LPC_HSADC_T
 HSADC register block structure. More...
 

Modules

 LPC18xx/43xx High speed ADC driver use examples
 

Macros

#define HSADC_MAX_SAMPLEVAL   0xFFF
 
#define HSADC_LS_DONE   (1 << 0)
 
#define HSADC_LS_OVERRUN   (1 << 1)
 
#define HSADC_LS_RANGE_IN   (0 << 2)
 
#define HSADC_LS_RANGE_BELOW   (1 << 2)
 
#define HSADC_LS_RANGE_ABOVE   (2 << 2)
 
#define HSADC_LS_RANGE(val)   ((val) & 0xC)
 
#define HSADC_LS_CROSSING_NONE   (0 << 4)
 
#define HSADC_LS_CROSSING_DOWN   (1 << 4)
 
#define HSADC_LS_CROSSING_UP   (2 << 4)
 
#define HSADC_LS_CROSSING(val)   ((val) & 0x30)
 
#define HSADC_LS_DATA(val)   ((val) >> 6)
 
#define HSADC_FIFO_SAMPLE_MASK   (0xFFF)
 
#define HSADC_FIFO_SAMPLE(val)   ((val) & 0xFFF)
 
#define HSADC_FIFO_CHAN_ID_MASK   (0x7000)
 
#define HSADC_FIFO_CHAN_ID(val)   (((val) >> 12) & 0x7)
 
#define HSADC_FIFO_EMPTY   (0x1 << 15)
 
#define HSADC_FIFO_SHIFTPACKED(val)   ((val) >> 16)
 
#define HSADC_FIFO_PACKEDMASK   (1UL << 31)
 
#define HSADC_DESC_CH(ch)   (ch)
 
#define HSADC_DESC_HALT   (1 << 3)
 
#define HSADC_DESC_INT   (1 << 4)
 
#define HSADC_DESC_POWERDOWN   (1 << 5)
 
#define HSADC_DESC_BRANCH_NEXT   (0 << 6)
 
#define HSADC_DESC_BRANCH_FIRST   (1 << 6)
 
#define HSADC_DESC_BRANCH_SWAP   (2 << 6)
 
#define HSADC_DESC_MATCH(val)   ((val) << 8)
 
#define HSADC_DESC_THRESH_NONE   (0 << 22)
 
#define HSADC_DESC_THRESH_A   (1 << 22)
 
#define HSADC_DESC_THRESH_B   (2 << 22)
 
#define HSADC_DESC_RESET_TIMER   (1 << 24)
 
#define HSADC_DESC_UPDATE_TABLE   (1UL << 31)
 
#define HSADC_INT0_FIFO_FULL   (1 << 0)
 
#define HSADC_INT0_FIFO_EMPTY   (1 << 1)
 
#define HSADC_INT0_FIFO_OVERFLOW   (1 << 2)
 
#define HSADC_INT0_DSCR_DONE   (1 << 3)
 
#define HSADC_INT0_DSCR_ERROR   (1 << 4)
 
#define HSADC_INT0_ADC_OVF   (1 << 5)
 
#define HSADC_INT0_ADC_UNF   (1 << 6)
 
#define HSADC_INT1_THCMP_BRANGE(ch)   (1 << ((ch * 5) + 0))
 
#define HSADC_INT1_THCMP_ARANGE(ch)   (1 << ((ch * 5) + 1))
 
#define HSADC_INT1_THCMP_DCROSS(ch)   (1 << ((ch * 5) + 2))
 
#define HSADC_INT1_THCMP_UCROSS(ch)   (1 << ((ch * 5) + 3))
 
#define HSADC_INT1_OVERRUN(ch)   (1 << ((ch * 5) + 4))
 

Enumerations

enum  HSADC_TRIGGER_MASK_T { HSADC_CONFIG_TRIGGER_OFF = 0, HSADC_CONFIG_TRIGGER_SW = 1, HSADC_CONFIG_TRIGGER_EXT = 2, HSADC_CONFIG_TRIGGER_BOTH = 3 }
 
enum  HSADC_TRIGGER_MODE_T { HSADC_CONFIG_TRIGGER_RISEEXT = (0 << 2), HSADC_CONFIG_TRIGGER_FALLEXT = (1 << 2), HSADC_CONFIG_TRIGGER_LOWEXT = (2 << 2), HSADC_CONFIG_TRIGGER_HIGHEXT = (3 << 2) }
 
enum  HSADC_TRIGGER_SYNC_T { HSADC_CONFIG_TRIGGER_NOEXTSYNC = (0 << 4), HSADC_CONFIG_TRIGGER_EXTSYNC = (1 << 4) }
 
enum  HSADC_CHANNEL_ID_EN_T { HSADC_CHANNEL_ID_EN_NONE = (0 << 5), HSADC_CHANNEL_ID_EN_ADD = (1 << 5) }
 
enum  HSADC_DCBIAS_T { HSADC_CHANNEL_NODCBIAS = 0, HSADC_CHANNEL_DCBIAS = 1 }
 

Functions

void Chip_HSADC_Init (LPC_HSADC_T *pHSADC)
 Initialize the High speed ADC. More...
 
void Chip_HSADC_DeInit (LPC_HSADC_T *pHSADC)
 Shutdown HSADC. More...
 
STATIC INLINE void Chip_HSADC_FlushFIFO (LPC_HSADC_T *pHSADC)
 Flush High speed ADC FIFO. More...
 
STATIC INLINE void Chip_HSADC_LoadDMADesc (LPC_HSADC_T *pHSADC)
 Load a descriptor table from memory by requesting a DMA write. More...
 
STATIC INLINE uint32_t Chip_HSADC_GetFIFOLevel (LPC_HSADC_T *pHSADC)
 Returns current HSADC FIFO fill level. More...
 
void Chip_HSADC_SetupFIFO (LPC_HSADC_T *pHSADC, uint8_t trip, bool packed)
 Sets up HSADC FIFO trip level and packing. More...
 
STATIC INLINE void Chip_HSADC_SWTrigger (LPC_HSADC_T *pHSADC)
 Starts a manual (software) trigger of HSADC descriptors. More...
 
STATIC INLINE void Chip_HSADC_SetActiveDescriptor (LPC_HSADC_T *pHSADC, uint8_t table, uint8_t desc)
 Set active table descriptor index and number. More...
 
STATIC INLINE uint8_t Chip_HSADC_GetActiveDescriptorIndex (LPC_HSADC_T *pHSADC)
 Returns currently active descriptor index being processed. More...
 
STATIC INLINE uint8_t Chip_HSADC_GetActiveDescriptorTable (LPC_HSADC_T *pHSADC)
 Returns currently active descriptor table being processed. More...
 
STATIC INLINE void Chip_HSADC_EnablePowerDownMode (LPC_HSADC_T *pHSADC)
 Enables ADC power down mode. More...
 
STATIC INLINE void Chip_HSADC_DisablePowerDownMode (LPC_HSADC_T *pHSADC)
 Disables ADC power down mode. More...
 
STATIC INLINE void Chip_HSADC_ConfigureTrigger (LPC_HSADC_T *pHSADC, HSADC_TRIGGER_MASK_T mask, HSADC_TRIGGER_MODE_T mode, HSADC_TRIGGER_SYNC_T sync, HSADC_CHANNEL_ID_EN_T chID, uint16_t recoveryTime)
 Configure HSADC trigger source and recovery time. More...
 
void Chip_HSADC_SetThrLowValue (LPC_HSADC_T *pHSADC, uint8_t thrnum, uint16_t value)
 Set HSADC Threshold low value. More...
 
void Chip_HSADC_SetThrHighValue (LPC_HSADC_T *pHSADC, uint8_t thrnum, uint16_t value)
 Set HSADC Threshold high value. More...
 
STATIC INLINE uint32_t Chip_HSADC_GetLastSample (LPC_HSADC_T *pHSADC, uint8_t channel)
 Read a ADC last sample register. More...
 
void Chip_HSADC_SetSpeed (LPC_HSADC_T *pHSADC, uint8_t channel, uint8_t speed)
 Setup speed for a input channel. More...
 
void Chip_HSADC_SetPowerSpeed (LPC_HSADC_T *pHSADC, bool comp2)
 Setup (common) HSADC power and speed settings. More...
 
void Chip_HSADC_SetACDCBias (LPC_HSADC_T *pHSADC, uint8_t channel, HSADC_DCBIAS_T dcInNeg, HSADC_DCBIAS_T dcInPos)
 Setup AC-DC coupling selection for a channel. More...
 
STATIC INLINE void Chip_HSADC_EnablePower (LPC_HSADC_T *pHSADC)
 Enable HSADC power control and band gap reference. More...
 
STATIC INLINE void Chip_HSADC_DisablePower (LPC_HSADC_T *pHSADC)
 Disable HSADC power control and band gap reference. More...
 
STATIC INLINE uint32_t Chip_HSADC_GetFIFO (LPC_HSADC_T *pHSADC)
 Reads the HSADC FIFO. More...
 
STATIC INLINE void Chip_HSADC_SetupDescEntry (LPC_HSADC_T *pHSADC, uint8_t table, uint8_t descNo, uint32_t desc)
 Sets up a raw HSADC descriptor entry. More...
 
STATIC INLINE void Chip_HSADC_UpdateDescTable (LPC_HSADC_T *pHSADC, uint8_t table)
 Update all descriptors of a table. More...
 
STATIC INLINE void Chip_HSADC_EnableInts (LPC_HSADC_T *pHSADC, uint8_t intGrp, uint32_t intMask)
 Enable an interrupt for HSADC interrupt group 0 or 1. More...
 
STATIC INLINE void Chip_HSADC_DisableInts (LPC_HSADC_T *pHSADC, uint8_t intGrp, uint32_t intMask)
 Disables an interrupt for HSADC interrupt group 0 or 1. More...
 
STATIC INLINE uint32_t Chip_HSADC_GetEnabledInts (LPC_HSADC_T *pHSADC, uint8_t intGrp)
 Returns enabled interrupt for HSADC interrupt group 0 or 1. More...
 
STATIC INLINE uint32_t Chip_HSADC_GetIntStatus (LPC_HSADC_T *pHSADC, uint8_t intGrp)
 Returns status for HSADC interrupt group 0 or 1. More...
 
STATIC INLINE void Chip_HSADC_ClearIntStatus (LPC_HSADC_T *pHSADC, uint8_t intGrp, uint32_t stsMask)
 Clear a status for HSADC interrupt group 0 or 1. More...
 
STATIC INLINE void Chip_HSADC_SetIntStatus (LPC_HSADC_T *pHSADC, uint8_t intGrp, uint32_t stsMask)
 Sets a status for HSADC interrupt group 0 or 1. More...
 
STATIC INLINE uint32_t Chip_HSADC_GetBaseClockRate (LPC_HSADC_T *pHSADC)
 Returns the clock rate in Hz for the HSADC. More...
 

Macro Definition Documentation

#define HSADC_DESC_BRANCH_FIRST   (1 << 6)

Branch to the first descriptor

Definition at line 413 of file hsadc_18xx_43xx.h.

#define HSADC_DESC_BRANCH_NEXT   (0 << 6)

Continue with next descriptor

Definition at line 412 of file hsadc_18xx_43xx.h.

#define HSADC_DESC_BRANCH_SWAP   (2 << 6)

Swap tables and branch to the first descriptor of the new table

Definition at line 414 of file hsadc_18xx_43xx.h.

#define HSADC_DESC_CH (   ch)    (ch)

HSADC descriptor registers bit fields and support macros Converter input channel

Definition at line 408 of file hsadc_18xx_43xx.h.

#define HSADC_DESC_HALT   (1 << 3)

Descriptor halt after conversion bit

Definition at line 409 of file hsadc_18xx_43xx.h.

#define HSADC_DESC_INT   (1 << 4)

Raise interrupt when ADC result is available bit

Definition at line 410 of file hsadc_18xx_43xx.h.

#define HSADC_DESC_MATCH (   val)    ((val) << 8)

Match value used to trigger a descriptor

Definition at line 415 of file hsadc_18xx_43xx.h.

#define HSADC_DESC_POWERDOWN   (1 << 5)

Power down after this conversion bit

Definition at line 411 of file hsadc_18xx_43xx.h.

#define HSADC_DESC_RESET_TIMER   (1 << 24)

Reset descriptor timer

Definition at line 419 of file hsadc_18xx_43xx.h.

#define HSADC_DESC_THRESH_A   (1 << 22)

Use A threshold detection

Definition at line 417 of file hsadc_18xx_43xx.h.

#define HSADC_DESC_THRESH_B   (2 << 22)

Use B threshold detection

Definition at line 418 of file hsadc_18xx_43xx.h.

#define HSADC_DESC_THRESH_NONE   (0 << 22)

No threshold detection performed

Definition at line 416 of file hsadc_18xx_43xx.h.

#define HSADC_DESC_UPDATE_TABLE   (1UL << 31)

Update table with all 8 descriptors of this table

Definition at line 420 of file hsadc_18xx_43xx.h.

#define HSADC_FIFO_CHAN_ID (   val)    (((val) >> 12) & 0x7)

Macro for stripping out sample data

Definition at line 386 of file hsadc_18xx_43xx.h.

#define HSADC_FIFO_CHAN_ID_MASK   (0x7000)

Channel ID mask

Definition at line 385 of file hsadc_18xx_43xx.h.

#define HSADC_FIFO_EMPTY   (0x1 << 15)

FIFO empty (invalid sample)

Definition at line 387 of file hsadc_18xx_43xx.h.

#define HSADC_FIFO_PACKEDMASK   (1UL << 31)

Packed sample check mask

Definition at line 389 of file hsadc_18xx_43xx.h.

#define HSADC_FIFO_SAMPLE (   val)    ((val) & 0xFFF)

Macro for stripping out unpacked sample data

Definition at line 384 of file hsadc_18xx_43xx.h.

#define HSADC_FIFO_SAMPLE_MASK   (0xFFF)

HSADC FIFO registers bit fields for unpacked sample in lower 16 bits 12-bit sample mask (unpacked)

Definition at line 383 of file hsadc_18xx_43xx.h.

#define HSADC_FIFO_SHIFTPACKED (   val)    ((val) >> 16)

Shifts the packed FIFO sample into the lower 16-bits of a word

Definition at line 388 of file hsadc_18xx_43xx.h.

#define HSADC_INT0_ADC_OVF   (1 << 5)

Converted sample value was over range of the 12 bit output code

Definition at line 465 of file hsadc_18xx_43xx.h.

#define HSADC_INT0_ADC_UNF   (1 << 6)

Converted sample value was under range of the 12 bit output code

Definition at line 466 of file hsadc_18xx_43xx.h.

#define HSADC_INT0_DSCR_DONE   (1 << 3)

The descriptor INTERRUPT field was enabled and its sample is converted

Definition at line 463 of file hsadc_18xx_43xx.h.

#define HSADC_INT0_DSCR_ERROR   (1 << 4)

The ADC was not fully woken up when a sample was converted and the conversion results is unreliable

Definition at line 464 of file hsadc_18xx_43xx.h.

#define HSADC_INT0_FIFO_EMPTY   (1 << 1)

FIFO is empty

Definition at line 461 of file hsadc_18xx_43xx.h.

#define HSADC_INT0_FIFO_FULL   (1 << 0)

number of samples in FIFO is more than FIFO_LEVEL

Definition at line 460 of file hsadc_18xx_43xx.h.

#define HSADC_INT0_FIFO_OVERFLOW   (1 << 2)

FIFO was full; conversion sample is not stored and lost

Definition at line 462 of file hsadc_18xx_43xx.h.

#define HSADC_INT1_OVERRUN (   ch)    (1 << ((ch * 5) + 4))

New conversion on channel completed and has overwritten the previous contents of register LAST_SAMPLE [0] before it has been read

Definition at line 474 of file hsadc_18xx_43xx.h.

#define HSADC_INT1_THCMP_ARANGE (   ch)    (1 << ((ch * 5) + 1))

Input channel result above range

Definition at line 471 of file hsadc_18xx_43xx.h.

#define HSADC_INT1_THCMP_BRANGE (   ch)    (1 << ((ch * 5) + 0))

Input channel result below range

Definition at line 470 of file hsadc_18xx_43xx.h.

#define HSADC_INT1_THCMP_DCROSS (   ch)    (1 << ((ch * 5) + 2))

Input channel result downward threshold crossing detected

Definition at line 472 of file hsadc_18xx_43xx.h.

#define HSADC_INT1_THCMP_UCROSS (   ch)    (1 << ((ch * 5) + 3))

Input channel result upward threshold crossing detected

Definition at line 473 of file hsadc_18xx_43xx.h.

#define HSADC_LS_CROSSING (   val)    ((val) & 0x30)

Mask for threshold crossing comparison result

Definition at line 288 of file hsadc_18xx_43xx.h.

#define HSADC_LS_CROSSING_DOWN   (1 << 4)

Downward threshold crossing detected

Definition at line 286 of file hsadc_18xx_43xx.h.

#define HSADC_LS_CROSSING_NONE   (0 << 4)

No threshold crossing detected

Definition at line 285 of file hsadc_18xx_43xx.h.

#define HSADC_LS_CROSSING_UP   (2 << 4)

Upward threshold crossing detected

Definition at line 287 of file hsadc_18xx_43xx.h.

#define HSADC_LS_DATA (   val)    ((val) >> 6)

Mask data value out of sample

Definition at line 289 of file hsadc_18xx_43xx.h.

#define HSADC_LS_DONE   (1 << 0)

HSADC last sample registers bit fields Sample conversion complete bit

Definition at line 279 of file hsadc_18xx_43xx.h.

#define HSADC_LS_OVERRUN   (1 << 1)

Sample overrun bit

Definition at line 280 of file hsadc_18xx_43xx.h.

#define HSADC_LS_RANGE (   val)    ((val) & 0xC)

Mask for threshold crossing comparison result

Definition at line 284 of file hsadc_18xx_43xx.h.

#define HSADC_LS_RANGE_ABOVE   (2 << 2)

Threshold range comparison is above range

Definition at line 283 of file hsadc_18xx_43xx.h.

#define HSADC_LS_RANGE_BELOW   (1 << 2)

Threshold range comparison is below range

Definition at line 282 of file hsadc_18xx_43xx.h.

#define HSADC_LS_RANGE_IN   (0 << 2)

Threshold range comparison is in range

Definition at line 281 of file hsadc_18xx_43xx.h.

#define HSADC_MAX_SAMPLEVAL   0xFFF

Definition at line 82 of file hsadc_18xx_43xx.h.

Enumeration Type Documentation

Enumerator
HSADC_CHANNEL_ID_EN_NONE 

do not add channel ID to FIFO output data

HSADC_CHANNEL_ID_EN_ADD 

add channel ID to FIFO output data

Definition at line 235 of file hsadc_18xx_43xx.h.

Enumerator
HSADC_CHANNEL_NODCBIAS 

No DC bias

HSADC_CHANNEL_DCBIAS 

DC bias on vin_neg side

Definition at line 336 of file hsadc_18xx_43xx.h.

Enumerator
HSADC_CONFIG_TRIGGER_OFF 

ADCHS triggers off

HSADC_CONFIG_TRIGGER_SW 

ADCHS software trigger only

HSADC_CONFIG_TRIGGER_EXT 

ADCHS external trigger only

HSADC_CONFIG_TRIGGER_BOTH 

ADCHS both software and external triggers allowed

Definition at line 213 of file hsadc_18xx_43xx.h.

Enumerator
HSADC_CONFIG_TRIGGER_RISEEXT 

ADCHS rising external trigger

HSADC_CONFIG_TRIGGER_FALLEXT 

ADCHS falling external trigger

HSADC_CONFIG_TRIGGER_LOWEXT 

ADCHS low external trigger

HSADC_CONFIG_TRIGGER_HIGHEXT 

ADCHS high external trigger

Definition at line 221 of file hsadc_18xx_43xx.h.

Enumerator
HSADC_CONFIG_TRIGGER_NOEXTSYNC 

do not synchronize external trigger input

HSADC_CONFIG_TRIGGER_EXTSYNC 

synchronize external trigger input

Definition at line 229 of file hsadc_18xx_43xx.h.

Function Documentation

STATIC INLINE void Chip_HSADC_ClearIntStatus ( LPC_HSADC_T pHSADC,
uint8_t  intGrp,
uint32_t  stsMask 
)

Clear a status for HSADC interrupt group 0 or 1.

Parameters
pHSADC: The base of ADC peripheral on the chip
intGrp: Interrupt group 0 or 1
stsMask: Statuses to clear, use HSADC_INT0_* for group 0 and HSADC_INT1_* values for group 1
Returns
Nothing

Definition at line 536 of file hsadc_18xx_43xx.h.

STATIC INLINE void Chip_HSADC_ConfigureTrigger ( LPC_HSADC_T pHSADC,
HSADC_TRIGGER_MASK_T  mask,
HSADC_TRIGGER_MODE_T  mode,
HSADC_TRIGGER_SYNC_T  sync,
HSADC_CHANNEL_ID_EN_T  chID,
uint16_t  recoveryTime 
)

Configure HSADC trigger source and recovery time.

Parameters
pHSADC: The base of HSADC peripheral on the chip
mask: HSADC trigger configuration mask type
mode: HSADC trigger configuration mode type
sync: HSADC trigger configuration sync type
chID: HSADC trigger configuration channel ID enable
recoveryTime: ADC recovery time (in HSADC clocks) from powerdown (255 max)
Returns
Nothing

Definition at line 250 of file hsadc_18xx_43xx.h.

void Chip_HSADC_DeInit ( LPC_HSADC_T pHSADC)

Shutdown HSADC.

Parameters
pHSADC: The base of HSADC peripheral on the chip
Returns
Nothing

Definition at line 78 of file hsadc_18xx_43xx.c.

STATIC INLINE void Chip_HSADC_DisableInts ( LPC_HSADC_T pHSADC,
uint8_t  intGrp,
uint32_t  intMask 
)

Disables an interrupt for HSADC interrupt group 0 or 1.

Parameters
pHSADC: The base of ADC peripheral on the chip
intGrp: Interrupt group 0 or 1
intMask: Interrupts to disable, use HSADC_INT0_* for group 0 and HSADC_INT1_* values for group 1
Returns
Nothing

Definition at line 497 of file hsadc_18xx_43xx.h.

STATIC INLINE void Chip_HSADC_DisablePower ( LPC_HSADC_T pHSADC)

Disable HSADC power control and band gap reference.

Parameters
pHSADC: The base of ADC peripheral on the chip
Returns
Nothing
Note
This function disables both the HSADC power and band gap reference.

Definition at line 377 of file hsadc_18xx_43xx.h.

STATIC INLINE void Chip_HSADC_DisablePowerDownMode ( LPC_HSADC_T pHSADC)

Disables ADC power down mode.

Parameters
pHSADC: The base of HSADC peripheral on the chip
Returns
Nothing
Note
In most cases, this function doesn't need to be used as the descriptors control power as needed.

Definition at line 207 of file hsadc_18xx_43xx.h.

STATIC INLINE void Chip_HSADC_EnableInts ( LPC_HSADC_T pHSADC,
uint8_t  intGrp,
uint32_t  intMask 
)

Enable an interrupt for HSADC interrupt group 0 or 1.

Parameters
pHSADC: The base of ADC peripheral on the chip
intGrp: Interrupt group 0 or 1
intMask: Interrupts to enable, use HSADC_INT0_* for group 0 and HSADC_INT1_* values for group 1
Returns
Nothing

Definition at line 484 of file hsadc_18xx_43xx.h.

STATIC INLINE void Chip_HSADC_EnablePower ( LPC_HSADC_T pHSADC)

Enable HSADC power control and band gap reference.

Parameters
pHSADC: The base of ADC peripheral on the chip
Returns
Nothing
Note
This function enables both the HSADC power and band gap reference.

Definition at line 365 of file hsadc_18xx_43xx.h.

STATIC INLINE void Chip_HSADC_EnablePowerDownMode ( LPC_HSADC_T pHSADC)

Enables ADC power down mode.

Parameters
pHSADC: The base of HSADC peripheral on the chip
Returns
Nothing
Note
In most cases, this function doesn't need to be used as the descriptors control power as needed.

Definition at line 195 of file hsadc_18xx_43xx.h.

STATIC INLINE void Chip_HSADC_FlushFIFO ( LPC_HSADC_T pHSADC)

Flush High speed ADC FIFO.

Parameters
pHSADC: The base of HSADC peripheral on the chip
Returns
Nothing

Definition at line 103 of file hsadc_18xx_43xx.h.

STATIC INLINE uint8_t Chip_HSADC_GetActiveDescriptorIndex ( LPC_HSADC_T pHSADC)

Returns currently active descriptor index being processed.

Parameters
pHSADC: The base of HSADC peripheral on the chip
Returns
the current active descriptor index, 0 to 7

Definition at line 173 of file hsadc_18xx_43xx.h.

STATIC INLINE uint8_t Chip_HSADC_GetActiveDescriptorTable ( LPC_HSADC_T pHSADC)

Returns currently active descriptor table being processed.

Parameters
pHSADC: The base of HSADC peripheral on the chip
Returns
the current active descriptor table, 0 or 1

Definition at line 183 of file hsadc_18xx_43xx.h.

STATIC INLINE uint32_t Chip_HSADC_GetBaseClockRate ( LPC_HSADC_T pHSADC)

Returns the clock rate in Hz for the HSADC.

Parameters
pHSADC: The base of HSADC peripheral on the chip
Returns
clock rate in Hz for the HSADC

Definition at line 559 of file hsadc_18xx_43xx.h.

STATIC INLINE uint32_t Chip_HSADC_GetEnabledInts ( LPC_HSADC_T pHSADC,
uint8_t  intGrp 
)

Returns enabled interrupt for HSADC interrupt group 0 or 1.

Parameters
pHSADC: The base of ADC peripheral on the chip
intGrp: Interrupt group 0 or 1
Returns
enabled interrupts for the selected group
Note
Mask the return value with a HSADC_INT0_* macro for group 0 or HSADC_INT1_* values for group 1 to determine which interrupts are enabled.

Definition at line 510 of file hsadc_18xx_43xx.h.

STATIC INLINE uint32_t Chip_HSADC_GetFIFO ( LPC_HSADC_T pHSADC)

Reads the HSADC FIFO.

Parameters
pHSADC: The base of ADC peripheral on the chip
Returns
HSADC FIFO value
Note
This function reads and pops the HSADC FIFO. The FIFO contents can be determined by using the HSADC_FIFO_* macros. If FIFO packing is enabled, this may contain 2 samples. Use the HSADC_FIFO_SHIFTPACKED macro to shift packed sample data into a variable that can be used with the HSADC_FIFO_* macros. Note that even if packing is enabled, the packed sample may not be valid.

Definition at line 402 of file hsadc_18xx_43xx.h.

STATIC INLINE uint32_t Chip_HSADC_GetFIFOLevel ( LPC_HSADC_T pHSADC)

Returns current HSADC FIFO fill level.

Parameters
pHSADC: The base of HSADC peripheral on the chip
Returns
FIFO level, 0 for empty, 1 to 15, or 16 for full
Note
WHat is this used for?

Definition at line 125 of file hsadc_18xx_43xx.h.

STATIC INLINE uint32_t Chip_HSADC_GetIntStatus ( LPC_HSADC_T pHSADC,
uint8_t  intGrp 
)

Returns status for HSADC interrupt group 0 or 1.

Parameters
pHSADC: The base of ADC peripheral on the chip
intGrp: Interrupt group 0 or 1
Returns
interrupt (pending) status for the selected group
Note
Mask the return value with a HSADC_INT0_* macro for group 0 or HSADC_INT1_* values for group 1 to determine which statuses are active.

Definition at line 523 of file hsadc_18xx_43xx.h.

STATIC INLINE uint32_t Chip_HSADC_GetLastSample ( LPC_HSADC_T pHSADC,
uint8_t  channel 
)

Read a ADC last sample register.

Parameters
pHSADC: The base of ADC peripheral on the chip
channel: Last sample register to read, 0-5
Returns
Current raw value of the indexed last sample register
Note
This function returns the raw value of the indexed last sample register and clears the sample's DONE and OVERRUN statuses if set. You can determine the overrun and datavalid status for the sample by masking the return value with HSADC_LS_DONE or HSADC_LS_OVERRUN. To get the data value for the sample, use the HSADC_LS_DATA(sample) macro. The threshold range and crossing results can be determined by using the HSADC_LS_RANGE(sample) and HSADC_LS_CROSSING(sample) macros and comparing the result against the HSADC_LS_RANGE_* or HSADC_LS_CROSSING_* definitions.

Definition at line 305 of file hsadc_18xx_43xx.h.

void Chip_HSADC_Init ( LPC_HSADC_T pHSADC)

Initialize the High speed ADC.

Parameters
pHSADC: The base of HSADC peripheral on the chip
Returns
Nothing

Definition at line 65 of file hsadc_18xx_43xx.c.

STATIC INLINE void Chip_HSADC_LoadDMADesc ( LPC_HSADC_T pHSADC)

Load a descriptor table from memory by requesting a DMA write.

Parameters
pHSADC: The base of HSADC peripheral on the chip
Returns
Nothing
Note
WHat is this used for?

Definition at line 114 of file hsadc_18xx_43xx.h.

void Chip_HSADC_SetACDCBias ( LPC_HSADC_T pHSADC,
uint8_t  channel,
HSADC_DCBIAS_T  dcInNeg,
HSADC_DCBIAS_T  dcInPos 
)

Setup AC-DC coupling selection for a channel.

Parameters
pHSADC: The base of ADC peripheral on the chip
channel: Input to set, 0-5
dcInNeg: AC-DC coupling selection on vin_neg side
dcInPos: AC-DC coupling selection on vin_pos side
Returns
Nothing
Note
This function sets up the HSADC current/power/speed settings that apply to all HSADC channels (inputs). Based on the HSADC clock rate, it will automatically setup the best current setting (CRS) and speed settings (DGEC) for all channels. (See user manual).
This function is also used to set the data format of the sampled data. It is recommended to call this function if the HSADC sample rate changes.

Definition at line 166 of file hsadc_18xx_43xx.c.

STATIC INLINE void Chip_HSADC_SetActiveDescriptor ( LPC_HSADC_T pHSADC,
uint8_t  table,
uint8_t  desc 
)

Set active table descriptor index and number.

Parameters
pHSADC: The base of HSADC peripheral on the chip
table: Table index, 0 or 1
desc: Descriptor index, 0 to 7
Returns
Nothing
Note
This function can be used to set active descriptor table and active descriptor entry values. The new values will be updated immediately. This should only be updated when descriptors are not running (halted).

Definition at line 163 of file hsadc_18xx_43xx.h.

STATIC INLINE void Chip_HSADC_SetIntStatus ( LPC_HSADC_T pHSADC,
uint8_t  intGrp,
uint32_t  stsMask 
)

Sets a status for HSADC interrupt group 0 or 1.

Parameters
pHSADC: The base of ADC peripheral on the chip
intGrp: Interrupt group 0 or 1
stsMask: Statuses to set, use HSADC_INT0_* for group 0 and HSADC_INT1_* values for group 1
Returns
Nothing

Definition at line 549 of file hsadc_18xx_43xx.h.

void Chip_HSADC_SetPowerSpeed ( LPC_HSADC_T pHSADC,
bool  comp2 
)

Setup (common) HSADC power and speed settings.

Parameters
pHSADC: The base of ADC peripheral on the chip
comp2: True sets up for 2's complement, false sets up for offset binary data format
Returns
Nothing
Note
This function sets up the HSADC current/power/speed settings that apply to all HSADC channels (inputs). Based on the HSADC clock rate, it will automatically setup the best current setting (CRS) and speed settings (DGEC) for all channels. (See user manual).
This function is also used to set the data format of the sampled data. It is recommended to call this function if the HSADC sample rate changes.

Definition at line 130 of file hsadc_18xx_43xx.c.

void Chip_HSADC_SetSpeed ( LPC_HSADC_T pHSADC,
uint8_t  channel,
uint8_t  speed 
)

Setup speed for a input channel.

Parameters
pHSADC: The base of ADC peripheral on the chip
channel: Input to set, 0-5
speed: Speed value to set (0xF, 0xE, or 0x0), see user manual
Returns
Nothing
Note
It is recommended not to use this function, as the values needed for this register will be setup with the Chip_HSADC_SetPowerSpeed() function.

Definition at line 121 of file hsadc_18xx_43xx.c.

void Chip_HSADC_SetThrHighValue ( LPC_HSADC_T pHSADC,
uint8_t  thrnum,
uint16_t  value 
)

Set HSADC Threshold high value.

Parameters
pHSADC: The base of HSADC peripheral on the chip
thrnum: Threshold register value (0 for threshold register A, 1 for threshold register B)
value: Threshold high data value (should be 12-bit value)
Returns
None

Definition at line 112 of file hsadc_18xx_43xx.c.

void Chip_HSADC_SetThrLowValue ( LPC_HSADC_T pHSADC,
uint8_t  thrnum,
uint16_t  value 
)

Set HSADC Threshold low value.

Parameters
pHSADC: The base of HSADC peripheral on the chip
thrnum: Threshold register value (0 for threshold register A, 1 for threshold register B)
value: Threshold low data value (should be 12-bit value)
Returns
None

Definition at line 103 of file hsadc_18xx_43xx.c.

STATIC INLINE void Chip_HSADC_SetupDescEntry ( LPC_HSADC_T pHSADC,
uint8_t  table,
uint8_t  descNo,
uint32_t  desc 
)

Sets up a raw HSADC descriptor entry.

Parameters
pHSADC: The base of ADC peripheral on the chip
table: Descriptor table number, 0 or 1
descNo: Descriptor number to setup, 0 to 7
desc: Raw descriptor value (see notes)
Returns
Nothing
Note
This function sets up a descriptor table entry. To setup a descriptor entry, select a OR'ed combination of the HSADC_DESC_CH, HSADC_DESC_HALT, HSADC_DESC_INT, HSADC_DESC_POWERDOWN, one of HSADC_DESC_BRANCH_*, HSADC_DESC_MATCH, one of HSADC_DESC_THRESH_*, and HSADC_DESC_RESET_TIMER definitions.
Example for setting up a table 0, descriptor number 4 entry for input 0:
Chip_HSADC_SetupDescEntry(LPC_HSADC, 0, 4, (HSADC_DESC_CH(0) | HSADC_DESC_HALT | HSADC_DESC_INT));

Definition at line 438 of file hsadc_18xx_43xx.h.

void Chip_HSADC_SetupFIFO ( LPC_HSADC_T pHSADC,
uint8_t  trip,
bool  packed 
)

Sets up HSADC FIFO trip level and packing.

Parameters
pHSADC: The base of HSADC peripheral on the chip
trip: HSADC FIFO trip point (1 to 15 samples)
packed: true to pack samples, false for no packing
Returns
Nothing
Note
The FIFO trip point is used for the DMA or interrupt level. Sample packging allows packing 2 samples into a single 32-bit word.

Definition at line 92 of file hsadc_18xx_43xx.c.

STATIC INLINE void Chip_HSADC_SWTrigger ( LPC_HSADC_T pHSADC)

Starts a manual (software) trigger of HSADC descriptors.

Parameters
pHSADC: The base of HSADC peripheral on the chip
Returns
Nothing

Definition at line 147 of file hsadc_18xx_43xx.h.

STATIC INLINE void Chip_HSADC_UpdateDescTable ( LPC_HSADC_T pHSADC,
uint8_t  table 
)

Update all descriptors of a table.

Parameters
pHSADC: The base of ADC peripheral on the chip
table: Descriptor table number, 0 or 1
Returns
Nothing
Note
Updates descriptor table with all 8 descriptors. This function should be used after all descriptors are setup with the Chip_HSADC_SetupDescEntry() function.

Definition at line 453 of file hsadc_18xx_43xx.h.