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LPCOpen Platform for LPC18XX/43XX microcontrollers
18XX43XX
LPCOpen Platform for the NXP LPC18XX/43XX family of Microcontrollers
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Data Structures | |
| struct | CCAN_IF_T |
| CCAN message interface register block structure. More... | |
| struct | LPC_CCAN_T |
| CCAN Controller Area Network register block structure. More... | |
| struct | CCAN_MSG_OBJ_T |
| CAN message object structure. More... | |
Macros | |
| #define | CCAN_CTRL_INIT (1 << 0) |
| #define | CCAN_CTRL_IE (1 << 1) |
| #define | CCAN_CTRL_SIE (1 << 2) |
| #define | CCAN_CTRL_EIE (1 << 3) |
| #define | CCAN_CTRL_DAR (1 << 5) |
| #define | CCAN_CTRL_CCE (1 << 6) |
| #define | CCAN_CTRL_TEST (1 << 7) |
| #define | CCAN_STAT_LEC_MASK (0x07) /* Mask for Last Error Code */ |
| #define | CCAN_STAT_TXOK (1 << 3) /* Transmitted a message successfully */ |
| #define | CCAN_STAT_RXOK (1 << 4) /* Received a message successfully */ |
| #define | CCAN_STAT_EPASS (1 << 5) /* The CAN controller is in the error passive state*/ |
| #define | CCAN_STAT_EWARN (1 << 6) /*At least one of the error counters in the EC has reached the error warning limit of 96.*/ |
| #define | CCAN_STAT_BOFF (1 << 7) /*The CAN controller is in busoff state.*/ |
| #define | CCAN_INT_NO_PENDING 0 |
| #define | CCAN_INT_STATUS 0x8000 |
| #define | CCAN_INT_MSG_NUM(n) (n) |
| #define | CCAN_TEST_BASIC_MODE (1 << 2) |
| #define | CCAN_TEST_SILENT_MODE (1 << 3) |
| #define | CCAN_TEST_LOOPBACK_MODE (1 << 4) |
| #define | CCAN_TEST_TD_CONTROLLED (0) |
| #define | CCAN_TEST_TD_MONITORED (1 << 5) |
| #define | CCAN_TEST_TD_DOMINANT (2 << 5) |
| #define | CCAN_TEST_TD_RECESSIVE (3 << 5) |
| #define | CCAN_TEST_RD_DOMINANT (0) |
| #define | CCAN_TEST_RD_RECESSIVE (1 << 7) |
| #define | CCAN_SEG1_DEFAULT_VAL 5 |
| #define | CCAN_SEG2_DEFAULT_VAL 4 |
| #define | CCAN_SJW_DEFAULT_VAL 0 |
| #define | CCAN_MSG_MAX_NUM 32 |
| #define | CCAN_IF_CMDREQ_MSG_NUM(n) (n) /* Message number (1->20) */ |
| #define | CCAN_IF_CMDREQ_BUSY 0x8000 /* 1 is writing is progress, cleared when RD/WR done */ |
| #define | CCAN_IF_CMDMSK_DATAB (1 << 0) /** 1 is transfer data byte 4-7 to message object, 0 is not */ |
| #define | CCAN_IF_CMDMSK_DATAA (1 << 1) /** 1 is transfer data byte 0-3 to message object, 0 is not */ |
| #define | CCAN_IF_CMDMSK_W_TXRQST (1 << 2) /** Request a transmission. Set the TXRQST bit IF1/2_MCTRL. */ |
| #define | CCAN_IF_CMDMSK_R_NEWDAT (1 << 2) /** Clear NEWDAT bit in the message object */ |
| #define | CCAN_IF_CMDMSK_R_CLRINTPND (1 << 3) /** Clear INTPND bit in the message object. */ |
| #define | CCAN_IF_CMDMSK_CTRL (1 << 4) /** 1 is transfer the CTRL bit to the message object, 0 is not */ |
| #define | CCAN_IF_CMDMSK_ARB (1 << 5) /** 1 is transfer the ARB bits to the message object, 0 is not */ |
| #define | CCAN_IF_CMDMSK_MASK (1 << 6) /** 1 is transfer the MASK bit to the message object, 0 is not */ |
| #define | CCAN_IF_CMDMSK_WR (1 << 7) /* Tranfer direction: Write */ |
| #define | CCAN_IF_CMDMSK_RD (0) /* Tranfer direction: Read */ |
| #define | CCAN_IF_CMDMSK_TRANSFER_ALL |
| #define | CCAN_IF_MASK2_MXTD (1 << 15) /* 1 is extended identifier bit is used in the RX filter unit, 0 is not */ |
| #define | CCAN_IF_MASK2_MDIR(n) (((n) & 0x01) << 14) /* 1 is direction bit is used in the RX filter unit, 0 is not */ |
| #define | CCAN_IF_ARB2_DIR(n) (((n) & 0x01) << 13) /* 1: Dir = transmit, 0: Dir = receive */ |
| #define | CCAN_IF_ARB2_XTD (1 << 14) /* Extended identifier bit is used*/ |
| #define | CCAN_IF_ARB2_MSGVAL (1 << 15) /* Message valid bit, 1 is valid in the MO handler, 0 is ignored */ |
| #define | CCAN_IF_MCTRL_DLC_MSK 0x000F /* bit mask for DLC */ |
| #define | CCAN_IF_MCTRL_EOB (1 << 7) /* End of buffer, always write to 1 */ |
| #define | CCAN_IF_MCTRL_TXRQ (1 << 8) /* 1 is TxRqst enabled */ |
| #define | CCAN_IF_MCTRL_RMTEN(n) (((n) & 1UL) << 9) /* 1 is remote frame enabled */ |
| #define | CCAN_IF_MCTRL_RXIE (1 << 10) /* 1 is RX interrupt enabled */ |
| #define | CCAN_IF_MCTRL_TXIE (1 << 11) /* 1 is TX interrupt enabled */ |
| #define | CCAN_IF_MCTRL_UMSK (1 << 12) /* 1 is to use the mask for the receive filter mask. */ |
| #define | CCAN_IF_MCTRL_INTP (1 << 13) /* 1 indicates message object is an interrupt source */ |
| #define | CCAN_IF_MCTRL_MLST (1 << 14) /* 1 indicates a message loss. */ |
| #define | CCAN_IF_MCTRL_NEWD (1 << 15) /* 1 indicates new data is in the message buffer. */ |
| #define | CCAN_MSG_ID_STD_MASK 0x07FF |
| #define | CCAN_MSG_ID_EXT_MASK 0x1FFFFFFF |
Enumerations | |
| enum | CCAN_LEC_T { CCAN_LEC_NO_ERROR, CCAN_LEC_STUFF_ERROR, CCAN_LEC_FORM_ERROR, CCAN_LEC_ACK_ERROR, CCAN_LEC_BIT1_ERROR, CCAN_LEC_BIT0_ERROR, CCAN_LEC_CRC_ERROR } |
| Last Error Code definition. More... | |
| enum | CCAN_TRANSFER_DIR_T { CCAN_RX_DIR, CCAN_TX_DIR } |
| CCAN Transfer direction definition. More... | |
| enum | CCAN_MSG_IF_T { CCAN_MSG_IF1 = 0, CCAN_MSG_IF2 = 1 } |
Functions | |
| STATIC INLINE void | Chip_CCAN_EnableInt (LPC_CCAN_T *pCCAN, uint32_t mask) |
| Enable CCAN Interrupts. More... | |
| STATIC INLINE void | Chip_CCAN_DisableInt (LPC_CCAN_T *pCCAN, uint32_t mask) |
| Disable CCAN Interrupts. More... | |
| STATIC INLINE uint32_t | Chip_CCAN_GetIntID (LPC_CCAN_T *pCCAN) |
| Get the source ID of an interrupt. More... | |
| STATIC INLINE uint32_t | Chip_CCAN_GetStatus (LPC_CCAN_T *pCCAN) |
| Get the CCAN status register. More... | |
| STATIC INLINE void | Chip_CCAN_SetStatus (LPC_CCAN_T *pCCAN, uint32_t val) |
| Set the CCAN status. More... | |
| void | Chip_CCAN_ClearStatus (LPC_CCAN_T *pCCAN, uint32_t val) |
| Clear the status of CCAN bus. More... | |
| STATIC INLINE uint8_t | Chip_CCAN_GetErrCounter (LPC_CCAN_T *pCCAN, CCAN_TRANSFER_DIR_T dir) |
| Get the current value of the transmit/receive error counter. More... | |
| STATIC INLINE void | Chip_CCAN_EnableTestMode (LPC_CCAN_T *pCCAN) |
| Enable test mode in CCAN. More... | |
| STATIC INLINE void | Chip_CCAN_DisableTestMode (LPC_CCAN_T *pCCAN) |
| Enable test mode in CCAN. More... | |
| STATIC INLINE void | Chip_CCAN_ConfigTestMode (LPC_CCAN_T *pCCAN, uint32_t cfg) |
| Enable/Disable test mode in CCAN. More... | |
| STATIC INLINE void | Chip_CCAN_EnableAutoRetransmit (LPC_CCAN_T *pCCAN) |
| Enable automatic retransmission. More... | |
| STATIC INLINE void | Chip_CCAN_DisableAutoRetransmit (LPC_CCAN_T *pCCAN) |
| Disable automatic retransmission. More... | |
| STATIC INLINE uint32_t | Chip_CCAN_GetTxRQST (LPC_CCAN_T *pCCAN) |
| Get the transmit repuest bit in all message objects. More... | |
| void | Chip_CCAN_Init (LPC_CCAN_T *pCCAN) |
| Initialize the CCAN peripheral, free all message object in RAM. More... | |
| void | Chip_CCAN_DeInit (LPC_CCAN_T *pCCAN) |
| De-initialize the CCAN peripheral. More... | |
| Status | Chip_CCAN_SetBitRate (LPC_CCAN_T *pCCAN, uint32_t bitRate) |
| Select bit rate for CCAN bus. More... | |
| void | Chip_CCAN_TransferMsgObject (LPC_CCAN_T *pCCAN, CCAN_MSG_IF_T IFSel, uint32_t mask, uint32_t msgNum) |
| Tranfer message object between IF registers and Message RAM. More... | |
| void | Chip_CCAN_SetMsgObject (LPC_CCAN_T *pCCAN, CCAN_MSG_IF_T IFSel, CCAN_TRANSFER_DIR_T dir, bool remoteFrame, uint8_t msgNum, const CCAN_MSG_OBJ_T *pMsgObj) |
| Set a message into the message object in message RAM. More... | |
| void | Chip_CCAN_GetMsgObject (LPC_CCAN_T *pCCAN, CCAN_MSG_IF_T IFSel, uint8_t msgNum, CCAN_MSG_OBJ_T *pMsgObj) |
| Get a message object in message RAM into the message buffer. More... | |
| void | Chip_CCAN_SetValidMsg (LPC_CCAN_T *pCCAN, CCAN_MSG_IF_T IFSel, uint8_t msgNum, bool valid) |
| Enable/Disable the message object to valid. More... | |
| STATIC INLINE uint32_t | Chip_CCAN_GetValidMsg (LPC_CCAN_T *pCCAN) |
| Check the message objects is valid or not. More... | |
| STATIC INLINE void | Chip_CCAN_ClearMsgIntPend (LPC_CCAN_T *pCCAN, CCAN_MSG_IF_T IFSel, uint8_t msgNum, CCAN_TRANSFER_DIR_T dir) |
| Clear the pending message interrupt. More... | |
| STATIC INLINE void | Chip_CCAN_ClearNewDataFlag (LPC_CCAN_T *pCCAN, CCAN_MSG_IF_T IFSel, uint8_t msgNum) |
| Clear new data flag bit in the message object. More... | |
| void | Chip_CCAN_Send (LPC_CCAN_T *pCCAN, CCAN_MSG_IF_T IFSel, bool remoteFrame, CCAN_MSG_OBJ_T *pMsgObj) |
| Send a message. More... | |
| void | Chip_CCAN_AddReceiveID (LPC_CCAN_T *pCCAN, CCAN_MSG_IF_T IFSel, uint32_t id) |
| Register a message ID for receiving. More... | |
| void | Chip_CCAN_DeleteReceiveID (LPC_CCAN_T *pCCAN, CCAN_MSG_IF_T IFSel, uint32_t id) |
| Remove a registered message ID from receiving. More... | |
| #define CCAN_CTRL_CCE (1 << 6) |
The CPU has write access to the CANBT register while the INIT bit is one.
Definition at line 97 of file ccan_18xx_43xx.h.
| #define CCAN_CTRL_DAR (1 << 5) |
Automatic retransmission disabled.
Definition at line 96 of file ccan_18xx_43xx.h.
| #define CCAN_CTRL_EIE (1 << 3) |
Error Interupt Enable.
Definition at line 95 of file ccan_18xx_43xx.h.
| #define CCAN_CTRL_IE (1 << 1) |
Module Interupt Enable.
Definition at line 93 of file ccan_18xx_43xx.h.
| #define CCAN_CTRL_INIT (1 << 0) |
Initialization is started.
Definition at line 92 of file ccan_18xx_43xx.h.
| #define CCAN_CTRL_SIE (1 << 2) |
Status Change Interupt Enable.
Definition at line 94 of file ccan_18xx_43xx.h.
| #define CCAN_CTRL_TEST (1 << 7) |
Test mode.
Definition at line 98 of file ccan_18xx_43xx.h.
| #define CCAN_IF_ARB2_DIR | ( | n | ) | (((n) & 0x01) << 13) /* 1: Dir = transmit, 0: Dir = receive */ |
Definition at line 362 of file ccan_18xx_43xx.h.
| #define CCAN_IF_ARB2_MSGVAL (1 << 15) /* Message valid bit, 1 is valid in the MO handler, 0 is ignored */ |
Definition at line 364 of file ccan_18xx_43xx.h.
| #define CCAN_IF_ARB2_XTD (1 << 14) /* Extended identifier bit is used*/ |
Definition at line 363 of file ccan_18xx_43xx.h.
| #define CCAN_IF_CMDMSK_ARB (1 << 5) /** 1 is transfer the ARB bits to the message object, 0 is not */ |
Definition at line 350 of file ccan_18xx_43xx.h.
| #define CCAN_IF_CMDMSK_CTRL (1 << 4) /** 1 is transfer the CTRL bit to the message object, 0 is not */ |
Definition at line 349 of file ccan_18xx_43xx.h.
| #define CCAN_IF_CMDMSK_DATAA (1 << 1) /** 1 is transfer data byte 0-3 to message object, 0 is not */ |
Definition at line 345 of file ccan_18xx_43xx.h.
| #define CCAN_IF_CMDMSK_DATAB (1 << 0) /** 1 is transfer data byte 4-7 to message object, 0 is not */ |
Definition at line 344 of file ccan_18xx_43xx.h.
| #define CCAN_IF_CMDMSK_MASK (1 << 6) /** 1 is transfer the MASK bit to the message object, 0 is not */ |
Definition at line 351 of file ccan_18xx_43xx.h.
| #define CCAN_IF_CMDMSK_R_CLRINTPND (1 << 3) /** Clear INTPND bit in the message object. */ |
Definition at line 348 of file ccan_18xx_43xx.h.
| #define CCAN_IF_CMDMSK_R_NEWDAT (1 << 2) /** Clear NEWDAT bit in the message object */ |
Definition at line 347 of file ccan_18xx_43xx.h.
| #define CCAN_IF_CMDMSK_RD (0) /* Tranfer direction: Read */ |
Definition at line 353 of file ccan_18xx_43xx.h.
| #define CCAN_IF_CMDMSK_TRANSFER_ALL |
Definition at line 354 of file ccan_18xx_43xx.h.
| #define CCAN_IF_CMDMSK_W_TXRQST (1 << 2) /** Request a transmission. Set the TXRQST bit IF1/2_MCTRL. */ |
Definition at line 346 of file ccan_18xx_43xx.h.
| #define CCAN_IF_CMDMSK_WR (1 << 7) /* Tranfer direction: Write */ |
Definition at line 352 of file ccan_18xx_43xx.h.
| #define CCAN_IF_CMDREQ_BUSY 0x8000 /* 1 is writing is progress, cleared when RD/WR done */ |
Definition at line 341 of file ccan_18xx_43xx.h.
| #define CCAN_IF_CMDREQ_MSG_NUM | ( | n | ) | (n) /* Message number (1->20) */ |
Definition at line 340 of file ccan_18xx_43xx.h.
| #define CCAN_IF_MASK2_MDIR | ( | n | ) | (((n) & 0x01) << 14) /* 1 is direction bit is used in the RX filter unit, 0 is not */ |
Definition at line 359 of file ccan_18xx_43xx.h.
| #define CCAN_IF_MASK2_MXTD (1 << 15) /* 1 is extended identifier bit is used in the RX filter unit, 0 is not */ |
Definition at line 358 of file ccan_18xx_43xx.h.
| #define CCAN_IF_MCTRL_DLC_MSK 0x000F /* bit mask for DLC */ |
Definition at line 367 of file ccan_18xx_43xx.h.
| #define CCAN_IF_MCTRL_EOB (1 << 7) /* End of buffer, always write to 1 */ |
Definition at line 368 of file ccan_18xx_43xx.h.
| #define CCAN_IF_MCTRL_INTP (1 << 13) /* 1 indicates message object is an interrupt source */ |
Definition at line 374 of file ccan_18xx_43xx.h.
| #define CCAN_IF_MCTRL_MLST (1 << 14) /* 1 indicates a message loss. */ |
Definition at line 375 of file ccan_18xx_43xx.h.
| #define CCAN_IF_MCTRL_NEWD (1 << 15) /* 1 indicates new data is in the message buffer. */ |
Definition at line 376 of file ccan_18xx_43xx.h.
| #define CCAN_IF_MCTRL_RMTEN | ( | n | ) | (((n) & 1UL) << 9) /* 1 is remote frame enabled */ |
Definition at line 370 of file ccan_18xx_43xx.h.
| #define CCAN_IF_MCTRL_RXIE (1 << 10) /* 1 is RX interrupt enabled */ |
Definition at line 371 of file ccan_18xx_43xx.h.
| #define CCAN_IF_MCTRL_TXIE (1 << 11) /* 1 is TX interrupt enabled */ |
Definition at line 372 of file ccan_18xx_43xx.h.
| #define CCAN_IF_MCTRL_TXRQ (1 << 8) /* 1 is TxRqst enabled */ |
Definition at line 369 of file ccan_18xx_43xx.h.
| #define CCAN_IF_MCTRL_UMSK (1 << 12) /* 1 is to use the mask for the receive filter mask. */ |
Definition at line 373 of file ccan_18xx_43xx.h.
| #define CCAN_INT_MSG_NUM | ( | n | ) | (n) |
Number of messages which caused interrupts
Definition at line 128 of file ccan_18xx_43xx.h.
| #define CCAN_INT_NO_PENDING 0 |
No interrupt pending
Definition at line 126 of file ccan_18xx_43xx.h.
| #define CCAN_INT_STATUS 0x8000 |
Status interrupt
Definition at line 127 of file ccan_18xx_43xx.h.
| #define CCAN_MSG_ID_EXT_MASK 0x1FFFFFFF |
Definition at line 379 of file ccan_18xx_43xx.h.
| #define CCAN_MSG_ID_STD_MASK 0x07FF |
Definition at line 378 of file ccan_18xx_43xx.h.
| #define CCAN_MSG_MAX_NUM 32 |
Number of message objects in Message RAM
Definition at line 323 of file ccan_18xx_43xx.h.
| #define CCAN_SEG1_DEFAULT_VAL 5 |
Definition at line 141 of file ccan_18xx_43xx.h.
| #define CCAN_SEG2_DEFAULT_VAL 4 |
Definition at line 142 of file ccan_18xx_43xx.h.
| #define CCAN_SJW_DEFAULT_VAL 0 |
Definition at line 143 of file ccan_18xx_43xx.h.
| #define CCAN_STAT_BOFF (1 << 7) /*The CAN controller is in busoff state.*/ |
Definition at line 106 of file ccan_18xx_43xx.h.
| #define CCAN_STAT_EPASS (1 << 5) /* The CAN controller is in the error passive state*/ |
Definition at line 104 of file ccan_18xx_43xx.h.
| #define CCAN_STAT_EWARN (1 << 6) /*At least one of the error counters in the EC has reached the error warning limit of 96.*/ |
Definition at line 105 of file ccan_18xx_43xx.h.
| #define CCAN_STAT_LEC_MASK (0x07) /* Mask for Last Error Code */ |
Definition at line 101 of file ccan_18xx_43xx.h.
| #define CCAN_STAT_RXOK (1 << 4) /* Received a message successfully */ |
Definition at line 103 of file ccan_18xx_43xx.h.
| #define CCAN_STAT_TXOK (1 << 3) /* Transmitted a message successfully */ |
Definition at line 102 of file ccan_18xx_43xx.h.
| #define CCAN_TEST_BASIC_MODE (1 << 2) |
IF1 registers used as TX buffer, IF2 registers used as RX buffer.
Definition at line 131 of file ccan_18xx_43xx.h.
| #define CCAN_TEST_LOOPBACK_MODE (1 << 4) |
Loop back mode is enabled.
Definition at line 133 of file ccan_18xx_43xx.h.
| #define CCAN_TEST_RD_DOMINANT (0) |
The CAN bus is dominant (RD = 0).
Definition at line 138 of file ccan_18xx_43xx.h.
| #define CCAN_TEST_RD_RECESSIVE (1 << 7) |
The CAN bus is recessive (RD = 1).
Definition at line 139 of file ccan_18xx_43xx.h.
| #define CCAN_TEST_SILENT_MODE (1 << 3) |
The module is in silent mode.
Definition at line 132 of file ccan_18xx_43xx.h.
| #define CCAN_TEST_TD_CONTROLLED (0) |
Level at the TD pin is controlled by the CAN controller.
Definition at line 134 of file ccan_18xx_43xx.h.
| #define CCAN_TEST_TD_DOMINANT (2 << 5) |
TD pin is driven LOW/dominant.
Definition at line 136 of file ccan_18xx_43xx.h.
| #define CCAN_TEST_TD_MONITORED (1 << 5) |
The sample point can be monitored at the TD pin.
Definition at line 135 of file ccan_18xx_43xx.h.
| #define CCAN_TEST_TD_RECESSIVE (3 << 5) |
TD pin is driven HIGH/recessive.
Definition at line 137 of file ccan_18xx_43xx.h.
| enum CCAN_LEC_T |
Last Error Code definition.
Definition at line 111 of file ccan_18xx_43xx.h.
| enum CCAN_MSG_IF_T |
| Enumerator | |
|---|---|
| CCAN_MSG_IF1 | |
| CCAN_MSG_IF2 | |
Definition at line 334 of file ccan_18xx_43xx.h.
| enum CCAN_TRANSFER_DIR_T |
CCAN Transfer direction definition.
| Enumerator | |
|---|---|
| CCAN_RX_DIR | |
| CCAN_TX_DIR | |
Definition at line 148 of file ccan_18xx_43xx.h.
| void Chip_CCAN_AddReceiveID | ( | LPC_CCAN_T * | pCCAN, |
| CCAN_MSG_IF_T | IFSel, | ||
| uint32_t | id | ||
| ) |
Register a message ID for receiving.
| pCCAN | : The base of CCAN peripheral on the chip |
| IFSel | : The Message interface to be used |
| id | : Received message ID |
Definition at line 288 of file ccan_18xx_43xx.c.
| STATIC INLINE void Chip_CCAN_ClearMsgIntPend | ( | LPC_CCAN_T * | pCCAN, |
| CCAN_MSG_IF_T | IFSel, | ||
| uint8_t | msgNum, | ||
| CCAN_TRANSFER_DIR_T | dir | ||
| ) |
Clear the pending message interrupt.
| pCCAN | : The base of CCAN peripheral on the chip |
| IFSel | : The Message interface to be used |
| msgNum | : Message number |
| dir | : Select transmit or receive interrupt to be cleared |
Definition at line 449 of file ccan_18xx_43xx.h.
| STATIC INLINE void Chip_CCAN_ClearNewDataFlag | ( | LPC_CCAN_T * | pCCAN, |
| CCAN_MSG_IF_T | IFSel, | ||
| uint8_t | msgNum | ||
| ) |
Clear new data flag bit in the message object.
| pCCAN | : The base of CCAN peripheral on the chip |
| IFSel | : The Message interface to be used |
| msgNum | : Message number |
Definition at line 464 of file ccan_18xx_43xx.h.
| void Chip_CCAN_ClearStatus | ( | LPC_CCAN_T * | pCCAN, |
| uint32_t | val | ||
| ) |
Clear the status of CCAN bus.
| pCCAN | : The base of CCAN peripheral on the chip |
| val | : Status to be cleared (or-ed bit value of CCAN_STAT_*) |
Definition at line 153 of file ccan_18xx_43xx.c.
| STATIC INLINE void Chip_CCAN_ConfigTestMode | ( | LPC_CCAN_T * | pCCAN, |
| uint32_t | cfg | ||
| ) |
Enable/Disable test mode in CCAN.
| pCCAN | : The base of CCAN peripheral on the chip |
| cfg | : Test function, or-ed bit values of CCAN_TEST_* |
Definition at line 265 of file ccan_18xx_43xx.h.
| void Chip_CCAN_DeInit | ( | LPC_CCAN_T * | pCCAN | ) |
De-initialize the CCAN peripheral.
| pCCAN | : The base of CCAN peripheral on the chip |
Definition at line 123 of file ccan_18xx_43xx.c.
| void Chip_CCAN_DeleteReceiveID | ( | LPC_CCAN_T * | pCCAN, |
| CCAN_MSG_IF_T | IFSel, | ||
| uint32_t | id | ||
| ) |
Remove a registered message ID from receiving.
| IFSel | : The Message interface to be used |
| pCCAN | : The base of CCAN peripheral on the chip |
| id | : Received message ID to be removed |
Definition at line 300 of file ccan_18xx_43xx.c.
| STATIC INLINE void Chip_CCAN_DisableAutoRetransmit | ( | LPC_CCAN_T * | pCCAN | ) |
Disable automatic retransmission.
| pCCAN | : The base of CCAN peripheral on the chip |
Definition at line 285 of file ccan_18xx_43xx.h.
| STATIC INLINE void Chip_CCAN_DisableInt | ( | LPC_CCAN_T * | pCCAN, |
| uint32_t | mask | ||
| ) |
Disable CCAN Interrupts.
| pCCAN | : The base of CCAN peripheral on the chip |
| mask | : Interrupt mask, or-ed bit value of
|
Definition at line 176 of file ccan_18xx_43xx.h.
| STATIC INLINE void Chip_CCAN_DisableTestMode | ( | LPC_CCAN_T * | pCCAN | ) |
Enable test mode in CCAN.
| pCCAN | : The base of CCAN peripheral on the chip |
Definition at line 253 of file ccan_18xx_43xx.h.
| STATIC INLINE void Chip_CCAN_EnableAutoRetransmit | ( | LPC_CCAN_T * | pCCAN | ) |
Enable automatic retransmission.
| pCCAN | : The base of CCAN peripheral on the chip |
Definition at line 275 of file ccan_18xx_43xx.h.
| STATIC INLINE void Chip_CCAN_EnableInt | ( | LPC_CCAN_T * | pCCAN, |
| uint32_t | mask | ||
| ) |
Enable CCAN Interrupts.
| pCCAN | : The base of CCAN peripheral on the chip |
| mask | : Interrupt mask, or-ed bit value of
|
Definition at line 162 of file ccan_18xx_43xx.h.
| STATIC INLINE void Chip_CCAN_EnableTestMode | ( | LPC_CCAN_T * | pCCAN | ) |
Enable test mode in CCAN.
| pCCAN | : The base of CCAN peripheral on the chip |
Definition at line 243 of file ccan_18xx_43xx.h.
| STATIC INLINE uint8_t Chip_CCAN_GetErrCounter | ( | LPC_CCAN_T * | pCCAN, |
| CCAN_TRANSFER_DIR_T | dir | ||
| ) |
Get the current value of the transmit/receive error counter.
| pCCAN | : The base of CCAN peripheral on the chip |
| dir | : direction |
Definition at line 233 of file ccan_18xx_43xx.h.
| STATIC INLINE uint32_t Chip_CCAN_GetIntID | ( | LPC_CCAN_T * | pCCAN | ) |
Get the source ID of an interrupt.
| pCCAN | : The base of CCAN peripheral on the chip |
Definition at line 186 of file ccan_18xx_43xx.h.
| void Chip_CCAN_GetMsgObject | ( | LPC_CCAN_T * | pCCAN, |
| CCAN_MSG_IF_T | IFSel, | ||
| uint8_t | msgNum, | ||
| CCAN_MSG_OBJ_T * | pMsgObj | ||
| ) |
Get a message object in message RAM into the message buffer.
| pCCAN | : The base of CCAN peripheral on the chip |
| IFSel | : The Message interface to be used |
| msgNum | : The number of message object in message RAM to be get |
| pMsgObj | : Pointer of the message buffer |
Definition at line 217 of file ccan_18xx_43xx.c.
| STATIC INLINE uint32_t Chip_CCAN_GetStatus | ( | LPC_CCAN_T * | pCCAN | ) |
Get the CCAN status register.
| pCCAN | : The base of CCAN peripheral on the chip |
Definition at line 196 of file ccan_18xx_43xx.h.
| STATIC INLINE uint32_t Chip_CCAN_GetTxRQST | ( | LPC_CCAN_T * | pCCAN | ) |
Get the transmit repuest bit in all message objects.
| pCCAN | : The base of CCAN peripheral on the chip |
Definition at line 295 of file ccan_18xx_43xx.h.
| STATIC INLINE uint32_t Chip_CCAN_GetValidMsg | ( | LPC_CCAN_T * | pCCAN | ) |
Check the message objects is valid or not.
| pCCAN | : The base of CCAN peripheral on the chip |
Definition at line 436 of file ccan_18xx_43xx.h.
| void Chip_CCAN_Init | ( | LPC_CCAN_T * | pCCAN | ) |
Initialize the CCAN peripheral, free all message object in RAM.
| pCCAN | : The base of CCAN peripheral on the chip |
Definition at line 110 of file ccan_18xx_43xx.c.
| void Chip_CCAN_Send | ( | LPC_CCAN_T * | pCCAN, |
| CCAN_MSG_IF_T | IFSel, | ||
| bool | remoteFrame, | ||
| CCAN_MSG_OBJ_T * | pMsgObj | ||
| ) |
Send a message.
| pCCAN | : The base of CCAN peripheral on the chip |
| IFSel | : The Message interface to be used |
| remoteFrame,: | Enable/Disable passives transmit by using remote frame |
| pMsgObj | : Message to be transmitted |
Definition at line 273 of file ccan_18xx_43xx.c.
| Status Chip_CCAN_SetBitRate | ( | LPC_CCAN_T * | pCCAN, |
| uint32_t | bitRate | ||
| ) |
Select bit rate for CCAN bus.
| pCCAN | : The base of CCAN peripheral on the chip |
| bitRate | : Bit rate to be set |
Definition at line 129 of file ccan_18xx_43xx.c.
| void Chip_CCAN_SetMsgObject | ( | LPC_CCAN_T * | pCCAN, |
| CCAN_MSG_IF_T | IFSel, | ||
| CCAN_TRANSFER_DIR_T | dir, | ||
| bool | remoteFrame, | ||
| uint8_t | msgNum, | ||
| const CCAN_MSG_OBJ_T * | pMsgObj | ||
| ) |
Set a message into the message object in message RAM.
| pCCAN | : The base of CCAN peripheral on the chip |
| IFSel | : The Message interface to be used |
| dir | : transmit/receive |
| remoteFrame,: | Enable/Disable passives transmit by using remote frame |
| msgNum | : Message number |
| pMsgObj | : Pointer of message to be set |
Definition at line 160 of file ccan_18xx_43xx.c.
| STATIC INLINE void Chip_CCAN_SetStatus | ( | LPC_CCAN_T * | pCCAN, |
| uint32_t | val | ||
| ) |
Set the CCAN status.
| pCCAN | : The base of CCAN peripheral on the chip |
| val | : Value to be set for status register (or-ed bit value of CCAN_STAT_*) |
Definition at line 207 of file ccan_18xx_43xx.h.
| void Chip_CCAN_SetValidMsg | ( | LPC_CCAN_T * | pCCAN, |
| CCAN_MSG_IF_T | IFSel, | ||
| uint8_t | msgNum, | ||
| bool | valid | ||
| ) |
Enable/Disable the message object to valid.
| pCCAN | : The base of CCAN peripheral on the chip |
| IFSel | : The Message interface to be used |
| msgNum | : Message number |
| valid | : true: valid, false: invalide |
Definition at line 257 of file ccan_18xx_43xx.c.
| void Chip_CCAN_TransferMsgObject | ( | LPC_CCAN_T * | pCCAN, |
| CCAN_MSG_IF_T | IFSel, | ||
| uint32_t | mask, | ||
| uint32_t | msgNum | ||
| ) |
Tranfer message object between IF registers and Message RAM.
| pCCAN | : The base of CCAN peripheral on the chip |
| IFSel | : The Message interface to be used |
| mask | : command mask (or-ed bit value of CCAN_IF_CMDMSK_*) |
| msgNum | : The number of message object in message RAM to be get |
Definition at line 246 of file ccan_18xx_43xx.c.
1.8.3.1