LPCOpen Platform for LPC18XX/43XX microcontrollers: C:/w/lpcopen_docs/software/lpc_core/lpc_chip/chip_18xx_43xx/chip_lpc43xx.h Source File

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chip_lpc43xx.h
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1 /*
2 * @brief LPC43xx basic chip inclusion file
3 *
4 * Copyright(C) NXP Semiconductors, 2012
5 * All rights reserved.
6 *
7 * Software that is described herein is for illustrative purposes only
8 * which provides customers with programming information regarding the
9 * LPC products. This software is supplied "AS IS" without any warranties of
10 * any kind, and NXP Semiconductors and its licensor disclaim any and
11 * all warranties, express or implied, including all implied warranties of
12 * merchantability, fitness for a particular purpose and non-infringement of
13 * intellectual property rights. NXP Semiconductors assumes no responsibility
14 * or liability for the use of the software, conveys no license or rights under any
15 * patent, copyright, mask work right, or any other intellectual property rights in
16 * or to any products. NXP Semiconductors reserves the right to make changes
17 * in the software without notification. NXP Semiconductors also makes no
18 * representation or warranty that such application will be suitable for the
19 * specified use without further testing or modification.
20 *
21 * Permission to use, copy, modify, and distribute this software and its
22 * documentation is hereby granted, under NXP Semiconductors' and its
23 * licensor's relevant copyrights in the software, without fee, provided that it
24 * is used in conjunction with NXP Semiconductors microcontrollers. This
25 * copyright, permission, and disclaimer notice must appear in all copies of
26 * this code.
27 */
28
29 #ifndef __CHIP_LPC43XX_H_
30 #define __CHIP_LPC43XX_H_
31
32 #include "lpc_types.h"
33 #include "sys_config.h"
34
35 #ifdef __cplusplus
36 extern "C" {
37 #endif
38
39 #if !defined(CORE_M4) && !defined(CORE_M0)
40 #error CORE_M4 or CORE_M0 is not defined for the LPC43xx architecture
41 #error CORE_M4 or CORE_M0 should be defined as part of your compiler define list
42 #endif
43
44 #ifndef CHIP_LPC43XX
45 #error The LPC43XX Chip include path is used for this build, but
46 #error CHIP_LPC43XX is not defined!
47 #endif
48
54 #define LPC_SCT_BASE 0x40000000
55 #define LPC_GPDMA_BASE 0x40002000
56 #define LPC_SPIFI_BASE 0x40003000
57 #define LPC_SDMMC_BASE 0x40004000
58 #define LPC_EMC_BASE 0x40005000
59 #define LPC_USB0_BASE 0x40006000
60 #define LPC_USB1_BASE 0x40007000
61 #define LPC_LCD_BASE 0x40008000
62 #define LPC_FMCA_BASE 0x4000C000
63 #define LPC_FMCB_BASE 0x4000D000
64 #define LPC_ETHERNET_BASE 0x40010000
65 #define LPC_ATIMER_BASE 0x40040000
66 #define LPC_REGFILE_BASE 0x40041000
67 #define LPC_PMC_BASE 0x40042000
68 #define LPC_CREG_BASE 0x40043000
69 #define LPC_EVRT_BASE 0x40044000
70 #define LPC_RTC_BASE 0x40046000
71 #define LPC_CGU_BASE 0x40050000
72 #define LPC_CCU1_BASE 0x40051000
73 #define LPC_CCU2_BASE 0x40052000
74 #define LPC_RGU_BASE 0x40053000
75 #define LPC_WWDT_BASE 0x40080000
76 #define LPC_USART0_BASE 0x40081000
77 #define LPC_USART2_BASE 0x400C1000
78 #define LPC_USART3_BASE 0x400C2000
79 #define LPC_UART1_BASE 0x40082000
80 #define LPC_SSP0_BASE 0x40083000
81 #define LPC_SSP1_BASE 0x400C5000
82 #define LPC_TIMER0_BASE 0x40084000
83 #define LPC_TIMER1_BASE 0x40085000
84 #define LPC_TIMER2_BASE 0x400C3000
85 #define LPC_TIMER3_BASE 0x400C4000
86 #define LPC_SCU_BASE 0x40086000
87 #define LPC_PIN_INT_BASE 0x40087000
88 #define LPC_GPIO_GROUP_INT0_BASE 0x40088000
89 #define LPC_GPIO_GROUP_INT1_BASE 0x40089000
90 #define LPC_MCPWM_BASE 0x400A0000
91 #define LPC_I2C0_BASE 0x400A1000
92 #define LPC_I2C1_BASE 0x400E0000
93 #define LPC_I2S0_BASE 0x400A2000
94 #define LPC_I2S1_BASE 0x400A3000
95 #define LPC_C_CAN1_BASE 0x400A4000
96 #define LPC_RITIMER_BASE 0x400C0000
97 #define LPC_QEI_BASE 0x400C6000
98 #define LPC_GIMA_BASE 0x400C7000
99 #define LPC_DAC_BASE 0x400E1000
100 #define LPC_C_CAN0_BASE 0x400E2000
101 #define LPC_ADC0_BASE 0x400E3000
102 #define LPC_ADC1_BASE 0x400E4000
103 #define LPC_ADCHS_BASE 0x400F0000
104 #define LPC_GPIO_PORT_BASE 0x400F4000
105 #define LPC_SPI_BASE 0x40100000
106 #define LPC_SGPIO_BASE 0x40101000
107 #define LPC_EEPROM_BASE 0x4000E000
108 #define LPC_ROM_API_BASE 0x10400100
109
110 #define LPC_SCT ((LPC_SCT_T *) LPC_SCT_BASE)
111 #define LPC_GPDMA ((LPC_GPDMA_T *) LPC_GPDMA_BASE)
112 #define LPC_SDMMC ((LPC_SDMMC_T *) LPC_SDMMC_BASE)
113 #define LPC_EMC ((LPC_EMC_T *) LPC_EMC_BASE)
114 #define LPC_USB0 ((LPC_USBHS_T *) LPC_USB0_BASE)
115 #define LPC_USB1 ((LPC_USBHS_T *) LPC_USB1_BASE)
116 #define LPC_LCD ((LPC_LCD_T *) LPC_LCD_BASE)
117 #define LPC_ETHERNET ((LPC_ENET_T *) LPC_ETHERNET_BASE)
118 #define LPC_ATIMER ((LPC_ATIMER_T *) LPC_ATIMER_BASE)
119 #define LPC_REGFILE ((LPC_REGFILE_T *) LPC_REGFILE_BASE)
120 #define LPC_PMC ((LPC_PMC_T *) LPC_PMC_BASE)
121 #define LPC_EVRT ((LPC_EVRT_T *) LPC_EVRT_BASE)
122 #define LPC_RTC ((LPC_RTC_T *) LPC_RTC_BASE)
123 #define LPC_CGU ((LPC_CGU_T *) LPC_CGU_BASE)
124 #define LPC_CCU1 ((LPC_CCU1_T *) LPC_CCU1_BASE)
125 #define LPC_CCU2 ((LPC_CCU2_T *) LPC_CCU2_BASE)
126 #define LPC_CREG ((LPC_CREG_T *) LPC_CREG_BASE)
127 #define LPC_RGU ((LPC_RGU_T *) LPC_RGU_BASE)
128 #define LPC_WWDT ((LPC_WWDT_T *) LPC_WWDT_BASE)
129 #define LPC_USART0 ((LPC_USART_T *) LPC_USART0_BASE)
130 #define LPC_USART2 ((LPC_USART_T *) LPC_USART2_BASE)
131 #define LPC_USART3 ((LPC_USART_T *) LPC_USART3_BASE)
132 #define LPC_UART1 ((LPC_USART_T *) LPC_UART1_BASE)
133 #define LPC_SSP0 ((LPC_SSP_T *) LPC_SSP0_BASE)
134 #define LPC_SSP1 ((LPC_SSP_T *) LPC_SSP1_BASE)
135 #define LPC_TIMER0 ((LPC_TIMER_T *) LPC_TIMER0_BASE)
136 #define LPC_TIMER1 ((LPC_TIMER_T *) LPC_TIMER1_BASE)
137 #define LPC_TIMER2 ((LPC_TIMER_T *) LPC_TIMER2_BASE)
138 #define LPC_TIMER3 ((LPC_TIMER_T *) LPC_TIMER3_BASE)
139 #define LPC_SCU ((LPC_SCU_T *) LPC_SCU_BASE)
140 #define LPC_GPIO_PIN_INT ((LPC_PIN_INT_T *) LPC_PIN_INT_BASE)
141 #define LPC_GPIOGROUP ((LPC_GPIOGROUPINT_T *) LPC_GPIO_GROUP_INT0_BASE)
142 #define LPC_MCPWM ((LPC_MCPWM_T *) LPC_MCPWM_BASE)
143 #define LPC_I2C0 ((LPC_I2C_T *) LPC_I2C0_BASE)
144 #define LPC_I2C1 ((LPC_I2C_T *) LPC_I2C1_BASE)
145 #define LPC_I2S0 ((LPC_I2S_T *) LPC_I2S0_BASE)
146 #define LPC_I2S1 ((LPC_I2S_T *) LPC_I2S1_BASE)
147 #define LPC_C_CAN1 ((LPC_CCAN_T *) LPC_C_CAN1_BASE)
148 #define LPC_RITIMER ((LPC_RITIMER_T *) LPC_RITIMER_BASE)
149 #define LPC_QEI ((LPC_QEI_T *) LPC_QEI_BASE)
150 #define LPC_GIMA ((LPC_GIMA_T *) LPC_GIMA_BASE)
151 #define LPC_DAC ((LPC_DAC_T *) LPC_DAC_BASE)
152 #define LPC_C_CAN0 ((LPC_CCAN_T *) LPC_C_CAN0_BASE)
153 #define LPC_ADC0 ((LPC_ADC_T *) LPC_ADC0_BASE)
154 #define LPC_ADC1 ((LPC_ADC_T *) LPC_ADC1_BASE)
155 #define LPC_ADCHS ((LPC_HSADC_T *) LPC_ADCHS_BASE)
156 #define LPC_GPIO_PORT ((LPC_GPIO_T *) LPC_GPIO_PORT_BASE)
157 #define LPC_SPI ((LPC_SPI_T *) LPC_SPI_BASE)
158 #define LPC_SGPIO ((LPC_SGPIO_T *) LPC_SGPIO_BASE)
159 #define LPC_EEPROM ((LPC_EEPROM_T *) LPC_EEPROM_BASE)
160 #define LPC_FMCA ((LPC_FMC_T *) LPC_FMCA_BASE)
161 #define LPC_FMC ((LPC_FMC_T * *) LPC_FMCA_BASE)
162 #define LPC_FMCB ((LPC_FMC_T *) LPC_FMCB_BASE)
163 #define LPC_ROM_API ((LPC_ROM_API_T *) LPC_ROM_API_BASE)
164
169 #include "scu_18xx_43xx.h"
170 #include "clock_18xx_43xx.h"
171 #include "rgu_18xx_43xx.h"
172 #include "creg_18xx_43xx.h"
173 #include "evrt_18xx_43xx.h"
174 #include "otp_18xx_43xx.h"
175 #include "sdif_18xx_43xx.h"
176 #include "adc_18xx_43xx.h"
177 #include "hsadc_18xx_43xx.h"
178 #include "atimer_18xx_43xx.h"
179 #include "aes_18xx_43xx.h"
180 #include "ccan_18xx_43xx.h"
181 #include "dac_18xx_43xx.h"
182 #include "eeprom_18xx_43xx.h"
183 #include "emc_18xx_43xx.h"
184 #include "enet_18xx_43xx.h"
185 #include "fmc_18xx_43xx.h"
186 #include "i2c_18xx_43xx.h"
187 #include "i2s_18xx_43xx.h"
188 #include "gima_18xx_43xx.h"
189 #include "gpdma_18xx_43xx.h"
190 #include "gpio_18xx_43xx.h"
191 #include "pinint_18xx_43xx.h"
192 #include "gpiogroup_18xx_43xx.h"
193 #include "lcd_18xx_43xx.h"
194 #include "mcpwm_18xx_43xx.h"
195 #include "pmc_18xx_43xx.h"
196 #include "qei_18xx_43xx.h"
197 #include "ritimer_18xx_43xx.h"
198 #include "rtc_18xx_43xx.h"
199 #include "sct_18xx_43xx.h"
200 #include "sct_pwm_18xx_43xx.h"
201 #include "sdmmc_18xx_43xx.h"
202 #include "sdio_18xx_43xx.h"
203 #include "sgpio_18xx_43xx.h"
204 #include "spi_18xx_43xx.h"
205 #include "ssp_18xx_43xx.h"
206 #include "timer_18xx_43xx.h"
207 #include "uart_18xx_43xx.h"
208 #include "usbhs_18xx_43xx.h"
209 #include "wwdt_18xx_43xx.h"
210 #include "romapi_18xx_43xx.h"
211 #include "i2cm_18xx_43xx.h"
212
213 #if defined(CORE_M4)
214 #include "fpu_init.h"
215 #endif
216
217 #ifdef __cplusplus
218 }
219 #endif
220
221 #endif /* __CHIP_LPC43XX_H_ */