LPCOpen Platform for LPC18XX/43XX microcontrollers
18XX43XX
LPCOpen Platform for the NXP LPC18XX/43XX family of Microcontrollers
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i2cm_18xx_43xx.h
Go to the documentation of this file.
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/*
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* @brief LPC18xx/43xx I2C driver
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*
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* @note
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* Copyright(C) NXP Semiconductors, 2013
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* All rights reserved.
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*
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* @par
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* Software that is described herein is for illustrative purposes only
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* which provides customers with programming information regarding the
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* LPC products. This software is supplied "AS IS" without any warranties of
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* any kind, and NXP Semiconductors and its licensor disclaim any and
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* all warranties, express or implied, including all implied warranties of
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* merchantability, fitness for a particular purpose and non-infringement of
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* intellectual property rights. NXP Semiconductors assumes no responsibility
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* or liability for the use of the software, conveys no license or rights under any
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* patent, copyright, mask work right, or any other intellectual property rights in
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* or to any products. NXP Semiconductors reserves the right to make changes
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* in the software without notification. NXP Semiconductors also makes no
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* representation or warranty that such application will be suitable for the
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* specified use without further testing or modification.
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*
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* @par
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* Permission to use, copy, modify, and distribute this software and its
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* documentation is hereby granted, under NXP Semiconductors' and its
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* licensor's relevant copyrights in the software, without fee, provided that it
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* is used in conjunction with NXP Semiconductors microcontrollers. This
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* copyright, permission, and disclaimer notice must appear in all copies of
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* this code.
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*/
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#ifndef __I2CM_18XX_43XX_H_
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#define __I2CM_18XX_43XX_H_
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#include "
i2c_common_18xx_43xx.h
"
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#ifdef __cplusplus
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extern
"C"
{
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#endif
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#define I2CM_XFER_OPTION_IGNORE_NACK 0x01
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#define I2CM_XFER_OPTION_LAST_RX_ACK 0x02
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#define I2CM_STATUS_OK 0x00
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#define I2CM_STATUS_ERROR 0x01
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#define I2CM_STATUS_NAK 0x02
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#define I2CM_STATUS_BUS_ERROR 0x03
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#define I2CM_STATUS_SLAVE_NAK 0x04
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#define I2CM_STATUS_ARBLOST 0x05
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#define I2CM_STATUS_BUSY 0xFF
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typedef struct {
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uint8_t
slaveAddr
;
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uint8_t
options
;
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uint16_t
status
;
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uint16_t txSz;
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uint16_t rxSz;
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const
uint8_t *
txBuff
;
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uint8_t *
rxBuff
;
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}
I2CM_XFER_T
;
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void
Chip_I2CM_Init
(
LPC_I2C_T
*pI2C);
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void
Chip_I2CM_DeInit
(
LPC_I2C_T
*pI2C);
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static
INLINE
void
Chip_I2CM_SetDutyCycle
(
LPC_I2C_T
*pI2C, uint16_t sclH, uint16_t sclL)
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{
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pI2C->
SCLH
= (uint32_t) sclH;
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pI2C->
SCLL
= (uint32_t) sclL;
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}
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void
Chip_I2CM_SetBusSpeed
(
LPC_I2C_T
*pI2C, uint32_t busSpeed);
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static
INLINE
void
Chip_I2CM_SendStart
(
LPC_I2C_T
*pI2C)
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{
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pI2C->
CONSET
=
I2C_CON_I2EN
|
I2C_CON_STA
;
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}
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static
INLINE
void
Chip_I2CM_ResetControl
(
LPC_I2C_T
*pI2C)
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{
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/* Reset STA, AA and SI. Stop flag should not be cleared as it is a reserved bit */
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pI2C->
CONCLR
=
I2C_CON_SI
|
I2C_CON_STA
|
I2C_CON_AA
;
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}
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static
INLINE
void
Chip_I2CM_WriteByte
(
LPC_I2C_T
*pI2C, uint8_t data)
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{
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pI2C->
DAT
= (uint32_t) data;
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}
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static
INLINE
uint8_t
Chip_I2CM_ReadByte
(
LPC_I2C_T
*pI2C)
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{
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return
(uint8_t) (pI2C->
DAT
&
I2C_I2DAT_BITMASK
);
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}
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static
INLINE
void
Chip_I2CM_NackNextByte
(
LPC_I2C_T
*pI2C)
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{
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pI2C->
CONCLR
=
I2C_CON_AA
;
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}
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static
INLINE
void
Chip_I2CM_SendStop
(
LPC_I2C_T
*pI2C)
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{
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pI2C->
CONSET
=
I2C_CON_STO
;
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}
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static
INLINE
void
Chip_I2CM_ForceStart
(
LPC_I2C_T
*pI2C)
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{
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/* check if we are pending on start */
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if
(pI2C->
CONSET
&
I2C_CON_STA
) {
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pI2C->
CONSET
=
I2C_CON_STO
;
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}
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else
{
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Chip_I2CM_SendStart
(pI2C);
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}
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}
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static
INLINE
void
Chip_I2CM_SendStartAfterStop
(
LPC_I2C_T
*pI2C)
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{
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pI2C->
CONSET
=
I2C_CON_STO
|
I2C_CON_STA
;
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}
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static
INLINE
uint32_t
Chip_I2CM_StateChanged
(
LPC_I2C_T
*pI2C)
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{
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return
pI2C->
CONSET
&
I2C_CON_SI
;
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}
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static
INLINE
void
Chip_I2CM_ClearSI
(
LPC_I2C_T
*pI2C)
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{
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/* Stop flag should not be cleared as it is a reserved bit */
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pI2C->
CONCLR
=
I2C_CON_SI
|
I2C_CON_STA
;
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}
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static
INLINE
uint32_t
Chip_I2CM_BusFree
(
LPC_I2C_T
*pI2C)
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{
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return
!(pI2C->
CONSET
&
I2C_CON_STO
);
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}
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static
INLINE
uint32_t
Chip_I2CM_GetCurState
(
LPC_I2C_T
*pI2C)
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{
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return
pI2C->
STAT
&
I2C_STAT_CODE_BITMASK
;
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}
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static
INLINE
void
Chip_I2CM_Disable
(
LPC_I2C_T
*pI2C)
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{
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pI2C->
CONCLR
=
I2C_CON_I2EN
;
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}
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uint32_t
Chip_I2CM_XferHandler
(
LPC_I2C_T
*pI2C,
I2CM_XFER_T
*xfer);
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void
Chip_I2CM_Xfer
(
LPC_I2C_T
*pI2C,
I2CM_XFER_T
*xfer);
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uint32_t
Chip_I2CM_XferBlocking
(
LPC_I2C_T
*pI2C,
I2CM_XFER_T
*xfer);
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uint32_t
Chip_I2CM_Write
(
LPC_I2C_T
*pI2C,
const
uint8_t *buff, uint32_t len);
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uint32_t
Chip_I2CM_Read
(
LPC_I2C_T
*pI2C, uint8_t *buff, uint32_t len);
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#ifdef __cplusplus
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}
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#endif
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#endif
/* __I2C_18XX_43XX_H_ */
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