LPCOpen Platform for LPC18XX/43XX microcontrollers
18XX43XX
LPCOpen Platform for the NXP LPC18XX/43XX family of Microcontrollers
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evrt_18xx_43xx.h
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/*
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* @brief LPC18xx/43xx event router driver
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*
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* @note
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* Copyright(C) NXP Semiconductors, 2012
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* All rights reserved.
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*
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* @par
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* Software that is described herein is for illustrative purposes only
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* which provides customers with programming information regarding the
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* LPC products. This software is supplied "AS IS" without any warranties of
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* any kind, and NXP Semiconductors and its licensor disclaim any and
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* all warranties, express or implied, including all implied warranties of
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* merchantability, fitness for a particular purpose and non-infringement of
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* intellectual property rights. NXP Semiconductors assumes no responsibility
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* or liability for the use of the software, conveys no license or rights under any
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* patent, copyright, mask work right, or any other intellectual property rights in
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* or to any products. NXP Semiconductors reserves the right to make changes
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* in the software without notification. NXP Semiconductors also makes no
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* representation or warranty that such application will be suitable for the
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* specified use without further testing or modification.
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*
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* @par
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* Permission to use, copy, modify, and distribute this software and its
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* documentation is hereby granted, under NXP Semiconductors' and its
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* licensor's relevant copyrights in the software, without fee, provided that it
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* is used in conjunction with NXP Semiconductors microcontrollers. This
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* copyright, permission, and disclaimer notice must appear in all copies of
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* this code.
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*/
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#ifndef __EVRT_18XX_43XX_H_
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#define __EVRT_18XX_43XX_H_
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#ifdef __cplusplus
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extern
"C"
{
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#endif
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typedef
struct
{
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__IO uint32_t
HILO
;
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__IO uint32_t
EDGE
;
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__I uint32_t RESERVED0[1012];
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__O uint32_t
CLR_EN
;
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__O uint32_t
SET_EN
;
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__I uint32_t
STATUS
;
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__I uint32_t
ENABLE
;
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__O uint32_t
CLR_STAT
;
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__O uint32_t
SET_STAT
;
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}
LPC_EVRT_T
;
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typedef
enum
CHIP_EVRT_SRC {
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EVRT_SRC_WAKEUP0
,
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EVRT_SRC_WAKEUP1
,
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EVRT_SRC_WAKEUP2
,
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EVRT_SRC_WAKEUP3
,
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EVRT_SRC_ATIMER
,
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EVRT_SRC_RTC
,
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EVRT_SRC_BOD1
,
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EVRT_SRC_WWDT
,
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EVRT_SRC_ETHERNET
,
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EVRT_SRC_USB0
,
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EVRT_SRC_USB1
,
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EVRT_SRC_SDIO
,
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EVRT_SRC_CCAN
,
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EVRT_SRC_COMBINE_TIMER2
,
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EVRT_SRC_COMBINE_TIMER6
,
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EVRT_SRC_QEI
,
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EVRT_SRC_COMBINE_TIMER14
,
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EVRT_SRC_RESERVED1
,
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EVRT_SRC_RESERVED2
,
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EVRT_SRC_RESET
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}
CHIP_EVRT_SRC_T
;
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#define PARAM_EVRT_SOURCE(n) ((n == EVRT_SRC_WAKEUP0) || (n == EVRT_SRC_WAKEUP1) \
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|| (n == EVRT_SRC_WAKEUP2) || (n == EVRT_SRC_WAKEUP3) \
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|| (n == EVRT_SRC_ATIMER) || (n == EVRT_SRC_RTC) \
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|| (n == EVRT_SRC_BOD1) || (n == EVRT_SRC_WWDT) \
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|| (n == EVRT_SRC_ETHERNET) || (n == EVRT_SRC_USB0) \
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|| (n == EVRT_SRC_USB1) || (n == EVRT_SRC_CCAN) || (n == EVRT_SRC_SDIO) \
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|| (n == EVRT_SRC_COMBINE_TIMER2) || (n == EVRT_SRC_COMBINE_TIMER6) \
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|| (n == EVRT_SRC_QEI) || (n == EVRT_SRC_COMBINE_TIMER14) \
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|| (n == EVRT_SRC_RESET)) \
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typedef
enum
CHIP_EVRT_SRC_ACTIVE {
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EVRT_SRC_ACTIVE_LOW_LEVEL
,
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EVRT_SRC_ACTIVE_HIGH_LEVEL
,
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EVRT_SRC_ACTIVE_FALLING_EDGE
,
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EVRT_SRC_ACTIVE_RISING_EDGE
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}
CHIP_EVRT_SRC_ACTIVE_T
;
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#define PARAM_EVRT_SOURCE_ACTIVE_TYPE(n) ((n == EVRT_SRC_ACTIVE_LOW_LEVEL) || (n == EVRT_SRC_ACTIVE_HIGH_LEVEL) \
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|| (n == EVRT_SRC_ACTIVE_FALLING_EDGE) || (n == EVRT_SRC_ACTIVE_RISING_EDGE))
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void
Chip_EVRT_Init
(
void
);
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void
Chip_EVRT_ConfigIntSrcActiveType
(
CHIP_EVRT_SRC_T
EVRT_Src,
CHIP_EVRT_SRC_ACTIVE_T
type);
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IntStatus
Chip_EVRT_IsSourceInterrupting
(
CHIP_EVRT_SRC_T
EVRT_Src);
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void
Chip_EVRT_SetUpIntSrc
(
CHIP_EVRT_SRC_T
EVRT_Src,
FunctionalState
state);
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STATIC
INLINE
void
Chip_EVRT_DeInit
(
void
)
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{
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LPC_EVRT
->CLR_EN = 0xFFFF;
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LPC_EVRT
->CLR_STAT = 0xFFFF;
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}
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STATIC
INLINE
void
Chip_EVRT_ClrPendIntSrc
(
CHIP_EVRT_SRC_T
EVRT_Src)
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{
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LPC_EVRT
->CLR_STAT = (1 << (uint8_t) EVRT_Src);
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}
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#ifdef __cplusplus
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}
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#endif
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#endif
/* __EVRT_18XX_43XX_H_ */
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