LPCOpen Platform for LPC18XX/43XX microcontrollers  18XX43XX
LPCOpen Platform for the NXP LPC18XX/43XX family of Microcontrollers
board_sysinit.c
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1 /*
2  * Copyright(C) NXP Semiconductors, 2012
3  * All rights reserved.
4  *
5  * Software that is described herein is for illustrative purposes only
6  * which provides customers with programming information regarding the
7  * LPC products. This software is supplied "AS IS" without any warranties of
8  * any kind, and NXP Semiconductors and its licensor disclaim any and
9  * all warranties, express or implied, including all implied warranties of
10  * merchantability, fitness for a particular purpose and non-infringement of
11  * intellectual property rights. NXP Semiconductors assumes no responsibility
12  * or liability for the use of the software, conveys no license or rights under any
13  * patent, copyright, mask work right, or any other intellectual property rights in
14  * or to any products. NXP Semiconductors reserves the right to make changes
15  * in the software without notification. NXP Semiconductors also makes no
16  * representation or warranty that such application will be suitable for the
17  * specified use without further testing or modification.
18  *
19  * Permission to use, copy, modify, and distribute this software and its
20  * documentation is hereby granted, under NXP Semiconductors' and its
21  * licensor's relevant copyrights in the software, without fee, provided that it
22  * is used in conjunction with NXP Semiconductors microcontrollers. This
23  * copyright, permission, and disclaimer notice must appear in all copies of
24  * this code.
25  */
26 
27 #include "board.h"
28 
29 /* The System initialization code is called prior to the application and
30  initializes the board for run-time operation. Board initialization
31  includes clock setup and default pin muxing configuration. */
32 
33 /*****************************************************************************
34  * Private types/enumerations/variables
35  ****************************************************************************/
36 
37 /* Structure for initial base clock states */
38 struct CLK_BASE_STATES {
39  CHIP_CGU_BASE_CLK_T clk; /* Base clock */
40  CHIP_CGU_CLKIN_T clkin; /* Base clock source, see UM for allowable souorces per base clock */
41  bool autoblock_enab;/* Set to true to enable autoblocking on frequency change */
42  bool powerdn; /* Set to true if the base clock is initially powered down */
43 };
44 
45 /* Initial base clock states are mostly on */
47 
48  /* Ethernet Clock base */
49  {CLK_BASE_PHY_TX, CLKIN_ENET_TX, true, false},
50  {CLK_BASE_PHY_RX, CLKIN_ENET_TX, true, false},
51 
52  /* Clocks derived from dividers */
53  {CLK_BASE_USB1, CLKIN_IDIVD, true, true}
54 };
55 
57 
58  /* Board LEDs */
62 
63  /* USB1 V-BUS Enable pin */
65 
66  /* ENET Pin mux (RMII Pins) */
76 };
77 
78 /*****************************************************************************
79  * Public types/enumerations/variables
80  ****************************************************************************/
81 
82 /*****************************************************************************
83  * Private functions
84  ****************************************************************************/
85 
86 /*****************************************************************************
87  * Public functions
88  ****************************************************************************/
89 
90 /* Sets up system pin muxing */
92 {
93  /* Setup system level pin muxing */
95 }
96 
97 /* Set up and initialize clocking prior to call to main */
99 {
100  int i;
101 
102  /* Enable Flash acceleration and setup wait states */
104 
105  /* Setup System core frequency to MAX_CLOCK_FREQ */
107 
108  /* Setup system base clocks and initial states. This won't enable and
109  disable individual clocks, but sets up the base clock sources for
110  each individual peripheral clock. */
111  for (i = 0; i < (sizeof(InitClkStates) / sizeof(InitClkStates[0])); i++) {
112  Chip_Clock_SetBaseClock(InitClkStates[i].clk, InitClkStates[i].clkin,
113  InitClkStates[i].autoblock_enab, InitClkStates[i].powerdn);
114  }
115 
116  /* Reset and enable 32Khz oscillator */
117  LPC_CREG->CREG0 &= ~((1 << 3) | (1 << 2));
118  LPC_CREG->CREG0 |= (1 << 1) | (1 << 0);
119 }
120 
121 /* Set up and initialize hardware prior to call to main */
123 {
124  /* Setup system clocking and memory. This is done early to allow the
125  application and tools to clear memory and use scatter loading to
126  external memory. */
129 }