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LPCOpen Platform for LPC18XX/43XX microcontrollers
18XX43XX
LPCOpen Platform for the NXP LPC18XX/43XX family of Microcontrollers
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10 or 12-bit ADC register block structure
Definition at line 51 of file adc_18xx_43xx.h.
#include "adc_18xx_43xx.h"
Data Fields | |
| __IO uint32_t | CR |
| __I uint32_t | GDR |
| __I uint32_t | RESERVED0 |
| __IO uint32_t | INTEN |
| __I uint32_t | DR [8] |
| __I uint32_t | STAT |
| __IO uint32_t CR |
< ADCn Structure A/D Control Register. The AD0CR register must be written to select the operating mode before A/D conversion can occur.
Definition at line 52 of file adc_18xx_43xx.h.
| __I uint32_t DR[8] |
A/D Channel Data Register. This register contains the result of the most recent conversion completed on channel n.
Definition at line 56 of file adc_18xx_43xx.h.
| __I uint32_t GDR |
A/D Global Data Register. Contains the result of the most recent A/D conversion.
Definition at line 53 of file adc_18xx_43xx.h.
| __IO uint32_t INTEN |
A/D Interrupt Enable Register. This register contains enable bits that allow the DONE flag of each A/D channel to be included or excluded from contributing to the generation of an A/D interrupt.
Definition at line 55 of file adc_18xx_43xx.h.
| __I uint32_t RESERVED0 |
Definition at line 54 of file adc_18xx_43xx.h.
| __I uint32_t STAT |
A/D Status Register. This register contains DONE and OVERRUN flags for all of the A/D channels, as well as the A/D interrupt flag.
Definition at line 57 of file adc_18xx_43xx.h.
1.8.3.1