LPCOpen Platform for LPC18XX/43XX microcontrollers: C:/w/lpcopen_docs/software/lpc_core/lpc_chip/chip_18xx_43xx/config_43xx_m0app/cmsis_43xx_m0app.h Source File

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cmsis_43xx_m0app.h
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1 /*
2 * @brief Basic CMSIS include file for LPC43XX
3 *
4 * @note
5 * Copyright(C) NXP Semiconductors, 2013
6 * All rights reserved.
7 *
8 * @par
9 * Software that is described herein is for illustrative purposes only
10 * which provides customers with programming information regarding the
11 * LPC products. This software is supplied "AS IS" without any warranties of
12 * any kind, and NXP Semiconductors and its licensor disclaim any and
13 * all warranties, express or implied, including all implied warranties of
14 * merchantability, fitness for a particular purpose and non-infringement of
15 * intellectual property rights. NXP Semiconductors assumes no responsibility
16 * or liability for the use of the software, conveys no license or rights under any
17 * patent, copyright, mask work right, or any other intellectual property rights in
18 * or to any products. NXP Semiconductors reserves the right to make changes
19 * in the software without notification. NXP Semiconductors also makes no
20 * representation or warranty that such application will be suitable for the
21 * specified use without further testing or modification.
22 *
23 * @par
24 * Permission to use, copy, modify, and distribute this software and its
25 * documentation is hereby granted, under NXP Semiconductors' and its
26 * licensor's relevant copyrights in the software, without fee, provided that it
27 * is used in conjunction with NXP Semiconductors microcontrollers. This
28 * copyright, permission, and disclaimer notice must appear in all copies of
29 * this code.
30 */
31
32 #ifndef __CMSIS_43XX_H_
33 #define __CMSIS_43XX_H_
34
35 #ifndef __CMSIS_H_
36 #error "cmsis_43xx.h should not be included directly use cmsis.h instead"
37 #endif
38
39 #ifdef __cplusplus
40 extern "C" {
41 #endif
42
48 #if defined(__ARMCC_VERSION)
49 #pragma diag_suppress 2525
50 #pragma push
51 #pragma anon_unions
52 #elif defined(__CWCC__)
53 #pragma push
54 #pragma cpp_extensions on
55 #elif defined(__GNUC__)
56 /* anonymous unions are enabled by default */
57 #elif defined(__IAR_SYSTEMS_ICC__)
58 #pragma language=extended
59 #else
60 #error Not supported compiler type
61 #endif
62
67 #define __MPU_PRESENT 0
68 #define __NVIC_PRIO_BITS 2
69 #define __Vendor_SysTickConfig 0
70 #define __FPU_PRESENT 0
80 typedef enum {
81 /* ------------------------- Cortex-M0 Processor Exceptions Numbers ----------------------------- */
82 Reset_IRQn = -15,
83 NonMaskableInt_IRQn = -14,
84 HardFault_IRQn = -13,
85 SVCall_IRQn = -5,
86 DebugMonitor_IRQn = -4,
87 PendSV_IRQn = -2,
88 SysTick_IRQn = -1,
90 /* --------------------------- LPC18xx/43xx Specific Interrupt Numbers ------------------------------- */
91 RTC_IRQn = 0,
92 M4_IRQn = 1,
93 DMA_IRQn = 2,
94 RESERVED1_IRQn = 3,
95 FLASHEEPROM_IRQn = 4,
96 ATIMER_IRQn = 4,
97 ETHERNET_IRQn = 5,
98 SDIO_IRQn = 6,
99 LCD_IRQn = 7,
100 USB0_IRQn = 8,
101 USB1_IRQn = 9,
102 SCT_IRQn = 10,
103 RITIMER_IRQn = 11,
104 WWDT_IRQn = 11,
105 TIMER0_IRQn = 12,
106 GINT1_IRQn = 13,
107 PIN_INT4_IRQn = 14,
108 TIMER3_IRQn = 15,
109 MCPWM_IRQn = 16,
110 ADC0_IRQn = 17,
111 I2C0_IRQn = 18,
112 I2C1_IRQn = 18,
113 SGPIO_INT_IRQn = 19,
114 SPI_INT_IRQn = 20,
115 DAC_IRQn = 20,
116 ADC1_IRQn = 21,
117 SSP0_IRQn = 22,
118 SSP1_IRQn = 22,
119 EVENTROUTER_IRQn = 23,
120 USART0_IRQn = 24,
121 UART1_IRQn = 25,
122 USART2_IRQn = 26,
123 C_CAN1_IRQn = 26,
124 USART3_IRQn = 27,
125 I2S0_IRQn = 28,
126 I2S1_IRQn = 28,
127 QEI_IRQn = 28,
128 C_CAN0_IRQn = 29,
129 ADCHS_IRQn = 30,
130 M0SUB_IRQn = 31,
131 } LPC43XX_M0_IRQn_Type;
132
137 typedef LPC43XX_M0_IRQn_Type IRQn_Type;
138
139 /* Cortex-M4 processor and core peripherals */
140 #include "core_cm0.h"
141
146 #ifdef __cplusplus
147 }
148 #endif
149
150 #endif /* ifndef __CMSIS_43XX_H_ */