LPCOpen Platform for LPC18XX/43XX microcontrollers  18XX43XX
LPCOpen Platform for the NXP LPC18XX/43XX family of Microcontrollers
gpio_18xx_43xx.h
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1 /*
2  * @brief LPC18xx/43xx GPIO driver
3  *
4  * @note
5  * Copyright(C) NXP Semiconductors, 2013
6  * All rights reserved.
7  *
8  * @par
9  * Software that is described herein is for illustrative purposes only
10  * which provides customers with programming information regarding the
11  * LPC products. This software is supplied "AS IS" without any warranties of
12  * any kind, and NXP Semiconductors and its licensor disclaim any and
13  * all warranties, express or implied, including all implied warranties of
14  * merchantability, fitness for a particular purpose and non-infringement of
15  * intellectual property rights. NXP Semiconductors assumes no responsibility
16  * or liability for the use of the software, conveys no license or rights under any
17  * patent, copyright, mask work right, or any other intellectual property rights in
18  * or to any products. NXP Semiconductors reserves the right to make changes
19  * in the software without notification. NXP Semiconductors also makes no
20  * representation or warranty that such application will be suitable for the
21  * specified use without further testing or modification.
22  *
23  * @par
24  * Permission to use, copy, modify, and distribute this software and its
25  * documentation is hereby granted, under NXP Semiconductors' and its
26  * licensor's relevant copyrights in the software, without fee, provided that it
27  * is used in conjunction with NXP Semiconductors microcontrollers. This
28  * copyright, permission, and disclaimer notice must appear in all copies of
29  * this code.
30  */
31 
32 #ifndef __GPIO_18XX_43XX_H_
33 #define __GPIO_18XX_43XX_H_
34 
35 #ifdef __cplusplus
36 extern "C" {
37 #endif
38 
47 typedef struct {
48  __IO uint8_t B[128][32];
49  __IO uint32_t W[32][32];
50  __IO uint32_t DIR[32];
51  __IO uint32_t MASK[32];
52  __IO uint32_t PIN[32];
53  __IO uint32_t MPIN[32];
54  __IO uint32_t SET[32];
55  __O uint32_t CLR[32];
56  __O uint32_t NOT[32];
57 } LPC_GPIO_T;
58 
64 void Chip_GPIO_Init(LPC_GPIO_T *pGPIO);
65 
71 void Chip_GPIO_DeInit(LPC_GPIO_T *pGPIO);
72 
81 STATIC INLINE void Chip_GPIO_WritePortBit(LPC_GPIO_T *pGPIO, uint32_t port, uint8_t pin, bool setting)
82 {
83  pGPIO->B[port][pin] = setting;
84 }
85 
95 STATIC INLINE void Chip_GPIO_SetPinState(LPC_GPIO_T *pGPIO, uint8_t port, uint8_t pin, bool setting)
96 {
97  pGPIO->B[port][pin] = setting;
98 }
99 
108 STATIC INLINE bool Chip_GPIO_ReadPortBit(LPC_GPIO_T *pGPIO, uint32_t port, uint8_t pin)
109 {
110  return (bool) pGPIO->B[port][pin];
111 }
112 
121 STATIC INLINE bool Chip_GPIO_GetPinState(LPC_GPIO_T *pGPIO, uint8_t port, uint8_t pin)
122 {
123  return (bool) pGPIO->B[port][pin];
124 }
125 
137 void Chip_GPIO_WriteDirBit(LPC_GPIO_T *pGPIO, uint32_t port, uint8_t bit, bool setting);
138 
146 STATIC INLINE void Chip_GPIO_SetPinDIROutput(LPC_GPIO_T *pGPIO, uint8_t port, uint8_t pin)
147 {
148  pGPIO->DIR[port] |= 1UL << pin;
149 }
150 
158 STATIC INLINE void Chip_GPIO_SetPinDIRInput(LPC_GPIO_T *pGPIO, uint8_t port, uint8_t pin)
159 {
160  pGPIO->DIR[port] &= ~(1UL << pin);
161 }
162 
171 void Chip_GPIO_SetPinDIR(LPC_GPIO_T *pGPIO, uint8_t port, uint8_t pin, bool output);
172 
181 STATIC INLINE bool Chip_GPIO_ReadDirBit(LPC_GPIO_T *pGPIO, uint32_t port, uint8_t bit)
182 {
183  return (bool) (((pGPIO->DIR[port]) >> bit) & 1);
184 }
185 
193 STATIC INLINE bool Chip_GPIO_GetPinDIR(LPC_GPIO_T *pGPIO, uint8_t port, uint8_t pin)
194 {
195  return (bool) (((pGPIO->DIR[port]) >> pin) & 1);
196 }
197 
208 void Chip_GPIO_SetDir(LPC_GPIO_T *pGPIO, uint8_t portNum, uint32_t bitValue, uint8_t out);
209 
219 STATIC INLINE void Chip_GPIO_SetPortDIROutput(LPC_GPIO_T *pGPIO, uint8_t port, uint32_t pinMask)
220 {
221  pGPIO->DIR[port] |= pinMask;
222 }
223 
233 STATIC INLINE void Chip_GPIO_SetPortDIRInput(LPC_GPIO_T *pGPIO, uint8_t port, uint32_t pinMask)
234 {
235  pGPIO->DIR[port] &= ~pinMask;
236 }
237 
248 void Chip_GPIO_SetPortDIR(LPC_GPIO_T *pGPIO, uint8_t port, uint8_t pinMask, bool outSet);
249 
258 STATIC INLINE uint32_t Chip_GPIO_GetPortDIR(LPC_GPIO_T *pGPIO, uint8_t port)
259 {
260  return pGPIO->DIR[port];
261 }
262 
273 STATIC INLINE void Chip_GPIO_SetPortMask(LPC_GPIO_T *pGPIO, uint8_t port, uint32_t mask)
274 {
275  pGPIO->MASK[port] = mask;
276 }
277 
286 STATIC INLINE uint32_t Chip_GPIO_GetPortMask(LPC_GPIO_T *pGPIO, uint8_t port)
287 {
288  return pGPIO->MASK[port];
289 }
290 
298 STATIC INLINE void Chip_GPIO_SetPortValue(LPC_GPIO_T *pGPIO, uint8_t port, uint32_t value)
299 {
300  pGPIO->PIN[port] = value;
301 }
302 
309 STATIC INLINE uint32_t Chip_GPIO_GetPortValue(LPC_GPIO_T *pGPIO, uint8_t port)
310 {
311  return pGPIO->PIN[port];
312 }
313 
321 STATIC INLINE void Chip_GPIO_SetMaskedPortValue(LPC_GPIO_T *pGPIO, uint8_t port, uint32_t value)
322 {
323  pGPIO->MPIN[port] = value;
324 }
325 
332 STATIC INLINE uint32_t Chip_GPIO_GetMaskedPortValue(LPC_GPIO_T *pGPIO, uint8_t port)
333 {
334  return pGPIO->MPIN[port];
335 }
336 
347 STATIC INLINE void Chip_GPIO_SetValue(LPC_GPIO_T *pGPIO, uint8_t portNum, uint32_t bitValue)
348 {
349  pGPIO->SET[portNum] = bitValue;
350 }
351 
361 STATIC INLINE void Chip_GPIO_SetPortOutHigh(LPC_GPIO_T *pGPIO, uint8_t port, uint32_t pins)
362 {
363  pGPIO->SET[port] = pins;
364 }
365 
375 STATIC INLINE void Chip_GPIO_SetPinOutHigh(LPC_GPIO_T *pGPIO, uint8_t port, uint8_t pin)
376 {
377  pGPIO->SET[port] = (1 << pin);
378 }
379 
389 STATIC INLINE void Chip_GPIO_ClearValue(LPC_GPIO_T *pGPIO, uint8_t portNum, uint32_t bitValue)
390 {
391  pGPIO->CLR[portNum] = bitValue;
392 }
393 
403 STATIC INLINE void Chip_GPIO_SetPortOutLow(LPC_GPIO_T *pGPIO, uint8_t port, uint32_t pins)
404 {
405  pGPIO->CLR[port] = pins;
406 }
407 
417 STATIC INLINE void Chip_GPIO_SetPinOutLow(LPC_GPIO_T *pGPIO, uint8_t port, uint8_t pin)
418 {
419  pGPIO->CLR[port] = (1 << pin);
420 }
421 
431 STATIC INLINE void Chip_GPIO_SetPortToggle(LPC_GPIO_T *pGPIO, uint8_t port, uint32_t pins)
432 {
433  pGPIO->NOT[port] = pins;
434 }
435 
445 STATIC INLINE void Chip_GPIO_SetPinToggle(LPC_GPIO_T *pGPIO, uint8_t port, uint8_t pin)
446 {
447  pGPIO->NOT[port] = (1 << pin);
448 }
449 
458 STATIC INLINE uint32_t Chip_GPIO_ReadValue(LPC_GPIO_T *pGPIO, uint8_t portNum)
459 {
460  return pGPIO->PIN[portNum];
461 }
462 
467 #ifdef __cplusplus
468 }
469 #endif
470 
471 #endif /* __GPIO_18XX_43XX_H_ */