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LPCOpen Platform for LPC18XX/43XX microcontrollers
18XX43XX
LPCOpen Platform for the NXP LPC18XX/43XX family of Microcontrollers
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I2S register block structure.
Definition at line 56 of file i2s_18xx_43xx.h.
#include "i2s_18xx_43xx.h"
Data Fields | |
| __IO uint32_t | DAO |
| __IO uint32_t | DAI |
| __O uint32_t | TXFIFO |
| __I uint32_t | RXFIFO |
| __I uint32_t | STATE |
| __IO uint32_t | DMA [I2S_DMA_REQUEST_CHANNEL_NUM] |
| __IO uint32_t | IRQ |
| __IO uint32_t | TXRATE |
| __IO uint32_t | RXRATE |
| __IO uint32_t | TXBITRATE |
| __IO uint32_t | RXBITRATE |
| __IO uint32_t | TXMODE |
| __IO uint32_t | RXMODE |
| __IO uint32_t DAI |
I2S Digital Audio Input Register. Contains control bits for the I2S receive channel
Definition at line 58 of file i2s_18xx_43xx.h.
| __IO uint32_t DAO |
< I2S Structure I2S Digital Audio Output Register. Contains control bits for the I2S transmit channel
Definition at line 57 of file i2s_18xx_43xx.h.
| __IO uint32_t DMA[I2S_DMA_REQUEST_CHANNEL_NUM] |
I2S DMA Configuration Registers. Contains control information for DMA request channels
Definition at line 62 of file i2s_18xx_43xx.h.
| __IO uint32_t IRQ |
I2S Interrupt Request Control Register. Contains bits that control how the I2S interrupt request is generated
Definition at line 63 of file i2s_18xx_43xx.h.
| __IO uint32_t RXBITRATE |
I2S Receive bit rate divider. This register determines the I2S receive bit rate by specifying the value to divide RX_MCLK by in order to produce the receive bit clock
Definition at line 67 of file i2s_18xx_43xx.h.
| __I uint32_t RXFIFO |
I2S Receive FIFO. Access register for the 8 x 32-bit receiver FIFO
Definition at line 60 of file i2s_18xx_43xx.h.
| __IO uint32_t RXMODE |
I2S Receive mode control
Definition at line 69 of file i2s_18xx_43xx.h.
| __IO uint32_t RXRATE |
I2S Receive MCLK divider. This register determines the I2S RX MCLK rate by specifying the value to divide PCLK by in order to produce MCLK
Definition at line 65 of file i2s_18xx_43xx.h.
| __I uint32_t STATE |
I2S Status Feedback Register. Contains status information about the I2S interface
Definition at line 61 of file i2s_18xx_43xx.h.
| __IO uint32_t TXBITRATE |
I2S Transmit bit rate divider. This register determines the I2S transmit bit rate by specifying the value to divide TX_MCLK by in order to produce the transmit bit clock
Definition at line 66 of file i2s_18xx_43xx.h.
| __O uint32_t TXFIFO |
I2S Transmit FIFO. Access register for the 8 x 32-bit transmitter FIFO
Definition at line 59 of file i2s_18xx_43xx.h.
| __IO uint32_t TXMODE |
I2S Transmit mode control
Definition at line 68 of file i2s_18xx_43xx.h.
| __IO uint32_t TXRATE |
I2S Transmit MCLK divider. This register determines the I2S TX MCLK rate by specifying the value to divide PCLK by in order to produce MCLK
Definition at line 64 of file i2s_18xx_43xx.h.
1.8.3.1