LPCOpen Platform for LPC18XX/43XX microcontrollers  18XX43XX
LPCOpen Platform for the NXP LPC18XX/43XX family of Microcontrollers
Macros
CHIP: LPC43xx (M0 Core) Cortex CMSIS definitions

Detailed Description

Macros

#define __MPU_PRESENT   0
 
#define __NVIC_PRIO_BITS   2
 
#define __Vendor_SysTickConfig   0
 
#define __FPU_PRESENT   0
 
#define __MPU_PRESENT   0
 
#define __NVIC_PRIO_BITS   2
 
#define __Vendor_SysTickConfig   0
 
#define __FPU_PRESENT   0
 

Macro Definition Documentation

#define __FPU_PRESENT   0

FPU present or not

Definition at line 70 of file cmsis_43xx_m0app.h.

#define __FPU_PRESENT   0

FPU present or not

Definition at line 70 of file cmsis_43xx_m0sub.h.

#define __MPU_PRESENT   0

MPU present or not

Definition at line 67 of file cmsis_43xx_m0app.h.

#define __MPU_PRESENT   0

MPU present or not

Definition at line 67 of file cmsis_43xx_m0sub.h.

#define __NVIC_PRIO_BITS   2

Number of Bits used for Priority Levels

Definition at line 68 of file cmsis_43xx_m0app.h.

#define __NVIC_PRIO_BITS   2

Number of Bits used for Priority Levels

Definition at line 68 of file cmsis_43xx_m0sub.h.

#define __Vendor_SysTickConfig   0

Set to 1 if different SysTick Config is used

Definition at line 69 of file cmsis_43xx_m0app.h.

#define __Vendor_SysTickConfig   0

Set to 1 if different SysTick Config is used

Definition at line 69 of file cmsis_43xx_m0sub.h.