LPCOpen Platform for LPC18XX/43XX microcontrollers: LPC_CGU_T Struct Reference

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LPC_CGU_T Struct Reference

## Detailed Description

LPC18XX/43XX CGU register block structure.

Definition at line 66 of file cguccu_18xx_43xx.h.

`#include "cguccu_18xx_43xx.h"`

## Data Fields
__I uint32_t | RESERVED0 [5]
__IO uint32_t | FREQ_MON
__IO uint32_t | XTAL_OSC_CTRL
CGU_PLL_REG_T | PLL [CGU_AUDIO_PLL+1]
__IO uint32_t | PLL0AUDIO_FRAC
__I uint32_t | PLL1_STAT
__IO uint32_t | PLL1_CTRL
__IO uint32_t | IDIV_CTRL [CLK_IDIV_LAST]
__IO uint32_t | BASE_CLK [CLK_BASE_LAST]

## Field Documentation

__IO uint32_t BASE_CLK[CLK_BASE_LAST]

(@ 0x4005005C) Start of base clock registers

Definition at line 75 of file cguccu_18xx_43xx.h.

__IO uint32_t FREQ_MON

(@ 0x40050014) Frequency monitor register

Definition at line 68 of file cguccu_18xx_43xx.h.

__IO uint32_t IDIV_CTRL[CLK_IDIV_LAST]

(@ 0x40050048) Integer divider A-E control registers

Definition at line 74 of file cguccu_18xx_43xx.h.

CGU_PLL_REG_T PLL[CGU_AUDIO_PLL+1]

(@ 0x4005001C) USB and audio PLL blocks

Definition at line 70 of file cguccu_18xx_43xx.h.

__IO uint32_t PLL0AUDIO_FRAC

(@ 0x4005003C) PLL0 (audio)

Definition at line 71 of file cguccu_18xx_43xx.h.

__IO uint32_t PLL1_CTRL

(@ 0x40050044) PLL1 control register

Definition at line 73 of file cguccu_18xx_43xx.h.

__I uint32_t PLL1_STAT

(@ 0x40050040) PLL1 status register

Definition at line 72 of file cguccu_18xx_43xx.h.

__I uint32_t RESERVED0[5]

< (@ 0x40050000) CGU Structure

Definition at line 67 of file cguccu_18xx_43xx.h.

__IO uint32_t XTAL_OSC_CTRL

(@ 0x40050018) Crystal oscillator control register

Definition at line 69 of file cguccu_18xx_43xx.h.

The documentation for this struct was generated from the following file:

- C:/w/lpcopen_docs/software/lpc_core/lpc_chip/chip_18xx_43xx/cguccu_18xx_43xx.h