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LPCOpen Platform for LPC18XX/43XX microcontrollers
18XX43XX
LPCOpen Platform for the NXP LPC18XX/43XX family of Microcontrollers
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HSADC interrupt handler
HSADC interrupts, when enabled, are routed via the ADCHS_IRQHandler() function on the M4 core and the SPIFI_ADCHS_IRQHandler() function on the M0 core. The handler is created by defining a global function with the handler name.
/* HSADC interrupt handler for the M4 core */
void ADCHS_IRQHandler(void)
{
/* HSADC interrupt processing */
}
Enabling HSADC interrupts
Once the handler is defined in an application, the HSADC interrupt can be enabled in the NVIC by calling NVIC_EnableIRQ() with the HSADC interrupt ID. For the M4 core, the HSADC interrupt ID is ADCHS_IRQn. For the M0 core, it is ADCHS_IRQn.
/* Enable HSADC interrupt for the M4 core */ NVIC_EnableIRQ(ADCHS_IRQn);
HSADC interrupt groups
The HSADC has 2 interrupt groups that share the same software API, but have different mapped interrupt IDs. Interrupt group 0 handles ADC status interrupts (FIFO empty/full, common overrun, descriptor complete, etc.). Interrupt group 1 handles individual channel overrun status and threshold events. When using the HSADC interrupt functions, only use HSADC_INT0_* definitions with group 0 and only use HSADC_INT1_* functions with group 1. Groups are selected as a parameter in the function call.
Examples:
/* Enable FIFO full interrupt (group 0) */
Chip_HSADC_EnableInts(LPC_ADCHS, 0, HSADC_INT0_FIFO_FULL);
/* Disable channel 3 overrun interrupt (group 1) */
Chip_HSADC_EnableInts(LPC_ADCHS, 1, HSADC_INT1_OVERRUN(3));
/* NOT LEGAL - USING A group 1 interrupt with a group 0 definition! */
Chip_HSADC_EnableInts(LPC_ADCHS, 1, HSADC_INT0_DSCR_DONE); /* NOT LEGAL */
Enabling and disabling interrupts
Use the Chip_HSADC_EnableInts() and Chip_HSADC_DisableInts() functions to enable and disable interrupts for the HSADC. You can OR multiple interrupt definitions together to enable or disable more than 1 interrupt at once. The Chip_HSADC_GetEnabledInts() functions can be used to determine which interrupts are enabled for a specific group.
/* Enable FIFO full and overflow interrupts */
Chip_HSADC_EnableInts(LPC_ADCHS, 0, (HSADC_INT0_FIFO_OVERFLOW | HSADC_INT0_FIFO_FULL));
/* Disable overrun interrupts for channels 1-3 interrupts */
Chip_HSADC_DisableInts(LPC_ADCHS, 1, (HSADC_INT1_OVERRUN(1) | HSADC_INT1_OVERRUN(2) |
HSADC_INT1_OVERRUN(3)));
/* Disable all interrupts for group 1 */
Chip_HSADC_DisableInts(LPC_ADCHS, 1, Chip_HSADC_GetEnabledInts(LPC_ADCHS, 1));
Clearing for forcing interrupt status
HSADC statuses for a group can be determined with the Chip_HSADC_GetIntStatus() function. Statuses are latched in the HSADC peripheral and must be cleared. Use the Chip_HSADC_ClearIntStatus() function to clear a latched status. A status can be forced by calling the Chip_HSADC_SetIntStatus() function.
/* Determine if the FIFO is full (tripped) */
if (Chip_HSADC_GetIntStatus(LPC_ADCHS, 0) & HSADC_INT0_FIFO_FULL) {
/* FIFO trip point has been reached, clear FIFO trip status */
Chip_HSADC_ClearIntStatus(LPC_ADCHS, 0, HSADC_INT0_FIFO_FULL);
}
1.8.3.1