LPCOpen Platform for LPC18XX/43XX microcontrollers: C:/w/lpcopen_docs/software/lpc_core/lpc_chip/chip_18xx_43xx/i2c_18xx_43xx.h Source File

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i2c_18xx_43xx.h
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1 /*
2 * @brief LPC18xx/43xx I2C driver
3 *
4 * @note
5 * Copyright(C) NXP Semiconductors, 2013
6 * All rights reserved.
7 *
8 * @par
9 * Software that is described herein is for illustrative purposes only
10 * which provides customers with programming information regarding the
11 * LPC products. This software is supplied "AS IS" without any warranties of
12 * any kind, and NXP Semiconductors and its licensor disclaim any and
13 * all warranties, express or implied, including all implied warranties of
14 * merchantability, fitness for a particular purpose and non-infringement of
15 * intellectual property rights. NXP Semiconductors assumes no responsibility
16 * or liability for the use of the software, conveys no license or rights under any
17 * patent, copyright, mask work right, or any other intellectual property rights in
18 * or to any products. NXP Semiconductors reserves the right to make changes
19 * in the software without notification. NXP Semiconductors also makes no
20 * representation or warranty that such application will be suitable for the
21 * specified use without further testing or modification.
22 *
23 * @par
24 * Permission to use, copy, modify, and distribute this software and its
25 * documentation is hereby granted, under NXP Semiconductors' and its
26 * licensor's relevant copyrights in the software, without fee, provided that it
27 * is used in conjunction with NXP Semiconductors microcontrollers. This
28 * copyright, permission, and disclaimer notice must appear in all copies of
29 * this code.
30 */
31
32 #ifndef __I2C_18XX_43XX_H_
33 #define __I2C_18XX_43XX_H_
34 #include "i2c_common_18xx_43xx.h"
35
36 #ifdef __cplusplus
37 extern "C" {
38 #endif
39
50 #define RET_SLAVE_TX 6
51 #define RET_SLAVE_RX 5
52 #define RET_SLAVE_IDLE 2
53 #define RET_SLAVE_BUSY 0
58 #define I2C_STA_STO_RECV 0x20
59
60 /*
61 * @brief I2C return status code definitions
62 */
63 #define I2C_I2STAT_NO_INF ((0xF8))
64 #define I2C_I2STAT_BUS_ERROR ((0x00))
66 /*
67 * @brief I2C status values
68 */
69 #define I2C_SETUP_STATUS_ARBF (1 << 8)
70 #define I2C_SETUP_STATUS_NOACKF (1 << 9)
71 #define I2C_SETUP_STATUS_DONE (1 << 10)
73 /*
74 * @brief I2C state handle return values
75 */
76 #define I2C_OK 0x00
77 #define I2C_BYTE_SENT 0x01
78 #define I2C_BYTE_RECV 0x02
79 #define I2C_LAST_BYTE_RECV 0x04
80 #define I2C_SEND_END 0x08
81 #define I2C_RECV_END 0x10
82 #define I2C_STA_STO_RECV 0x20
83
84 #define I2C_ERR (0x10000000)
85 #define I2C_NAK_RECV (0x10000000 | 0x01)
86
87 #define I2C_CheckError(ErrorCode) (ErrorCode & 0x10000000)
88
89 /*
90 * @brief I2C monitor control configuration defines
91 */
92 #define I2C_MONITOR_CFG_SCL_OUTPUT I2C_I2MMCTRL_ENA_SCL
93 #define I2C_MONITOR_CFG_MATCHALL I2C_I2MMCTRL_MATCH_ALL
98 typedef enum {
99 I2C_SLAVE_GENERAL,
100 I2C_SLAVE_0,
101 I2C_SLAVE_1,
102 I2C_SLAVE_2,
103 I2C_SLAVE_3,
104 I2C_SLAVE_NUM_INTERFACE
105 } I2C_SLAVE_ID;
106
110 typedef enum {
111 I2C_STATUS_DONE,
112 I2C_STATUS_NAK,
113 I2C_STATUS_ARBLOST,
114 I2C_STATUS_BUSERR,
115 I2C_STATUS_BUSY,
116 I2C_STATUS_SLAVENAK,
117 } I2C_STATUS_T;
118
122 typedef struct {
123 uint8_t slaveAddr;
124 const uint8_t *txBuff;
125 int txSz;
127 uint8_t *rxBuff;
128 int rxSz;
130 I2C_STATUS_T status;
131 } I2C_XFER_T;
132
141 typedef enum I2C_ID {
142 I2C0,
143 I2C1,
144 I2C_NUM_INTERFACE
145 } I2C_ID_T;
146
150 typedef enum {
151 I2C_EVENT_WAIT = 1,
152 I2C_EVENT_DONE,
153 I2C_EVENT_LOCK,
154 I2C_EVENT_UNLOCK,
155 I2C_EVENT_SLAVE_RX,
156 I2C_EVENT_SLAVE_TX,
157 } I2C_EVENT_T;
158
162 typedef void (*I2C_EVENTHANDLER_T)(I2C_ID_T, I2C_EVENT_T);
163
169 void Chip_I2C_Init(I2C_ID_T id);
170
176 void Chip_I2C_DeInit(I2C_ID_T id);
177
189 void Chip_I2C_SetClockRate(I2C_ID_T id, uint32_t clockrate);
190
196 uint32_t Chip_I2C_GetClockRate(I2C_ID_T id);
197
217 int Chip_I2C_MasterTransfer(I2C_ID_T id, I2C_XFER_T *xfer);
218
227 int Chip_I2C_MasterSend(I2C_ID_T id, uint8_t slaveAddr, const uint8_t *buff, uint8_t len);
228
238 int Chip_I2C_MasterCmdRead(I2C_ID_T id, uint8_t slaveAddr, uint8_t cmd, uint8_t *buff, int len);
239
245 I2C_EVENTHANDLER_T Chip_I2C_GetMasterEventHandler(I2C_ID_T id);
246
253 int Chip_I2C_SetMasterEventHandler(I2C_ID_T id, I2C_EVENTHANDLER_T event);
254
263 int Chip_I2C_MasterRead(I2C_ID_T id, uint8_t slaveAddr, uint8_t *buff, int len);
264
271 void Chip_I2C_EventHandlerPolling(I2C_ID_T id, I2C_EVENT_T event);
272
279 void Chip_I2C_EventHandler(I2C_ID_T id, I2C_EVENT_T event);
280
287 void Chip_I2C_MasterStateHandler(I2C_ID_T id);
288
294 void Chip_I2C_Disable(I2C_ID_T id);
295
305 int Chip_I2C_IsMasterActive(I2C_ID_T id);
306
368 void Chip_I2C_SlaveSetup(I2C_ID_T id,
369 I2C_SLAVE_ID sid,
370 I2C_XFER_T *xfer,
371 I2C_EVENTHANDLER_T event,
372 uint8_t addrMask);
373
379 void Chip_I2C_SlaveStateHandler(I2C_ID_T id);
380
390 int Chip_I2C_IsStateChanged(I2C_ID_T id);
391
396 #ifdef __cplusplus
397 }
398 #endif
399
400 #endif /* __I2C_18XX_43XX_H_ */