LPCOpen Platform for LPC18XX/43XX microcontrollers: C:/w/lpcopen_docs/software/lpcspifilib/inc/spifilib_dev.h Source File

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spifilib_dev.h
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1 /*
2 * @brief LPCSPIFILIB FLASH library device specific functions
3 *
4 * @note
5 * Copyright(C) NXP Semiconductors, 2014
6 * All rights reserved.
7 *
8 * @par
9 * Software that is described herein is for illustrative purposes only
10 * which provides customers with programming information regarding the
11 * LPC products. This software is supplied "AS IS" without any warranties of
12 * any kind, and NXP Semiconductors and its licenser disclaim any and
13 * all warranties, express or implied, including all implied warranties of
14 * merchantability, fitness for a particular purpose and non-infringement of
15 * intellectual property rights. NXP Semiconductors assumes no responsibility
16 * or liability for the use of the software, conveys no license or rights under any
17 * patent, copyright, mask work right, or any other intellectual property rights in
18 * or to any products. NXP Semiconductors reserves the right to make changes
19 * in the software without notification. NXP Semiconductors also makes no
20 * representation or warranty that such application will be suitable for the
21 * specified use without further testing or modification.
22 *
23 * @par
24 * Permission to use, copy, modify, and distribute this software and its
25 * documentation is hereby granted, under NXP Semiconductors' and its
26 * licensor's relevant copyrights in the software, without fee, provided that it
27 * is used in conjunction with NXP Semiconductors microcontrollers. This
28 * copyright, permission, and disclaimer notice must appear in all copies of
29 * this code.
30 */
31
32 #ifndef __SPIFILIB_DEV_H_
33 #define __SPIFILIB_DEV_H_
34
35 #include <stdint.h>
36
37 #ifdef __cplusplus
38 extern "C" {
39 #endif
40
41 /* Define for inline functions */
42 #ifndef INLINE
43 #ifdef __CC_ARM
44 #define INLINE __inline
45 #else
46 #define INLINE inline
47 #endif /* __CC_ARM */
48 #endif /* !INLINE */
49
57 typedef enum {
58 SPIFI_ERR_NONE = 0,
59 SPIFI_ERR_BUSY,
60 SPIFI_ERR_GEN,
61 SPIFI_ERR_NOTSUPPORTED,
62 SPIFI_ERR_ALIGNERR,
63 SPIFI_ERR_LOCKED,
64 SPIFI_ERR_PROGERR,
65 SPIFI_ERR_ERASEERR,
66 SPIFI_ERR_NOTBLANK,
67 SPIFI_ERR_PAGESIZE,
68 SPIFI_ERR_VAL,
69 SPIFI_ERR_RANGE,
70 SPIFI_ERR_MEMMODE,
72 SPIFI_ERR_LASTINDEX /* Internal use to count number of errors */
74 } SPIFI_ERR_T;
75
79 #define SPIFI_CAP_DUAL_READ (1 << 0)
80 #define SPIFI_CAP_DUAL_WRITE (1 << 1)
81 #define SPIFI_CAP_QUAD_READ (1 << 2)
82 #define SPIFI_CAP_QUAD_WRITE (1 << 3)
83 #define SPIFI_CAP_FULLLOCK (1 << 4)
84 #define SPIFI_CAP_BLOCKLOCK (1 << 5)
85 #define SPIFI_CAP_SUBBLKERASE (1 << 6)
86 #define SPIFI_CAP_4BYTE_ADDR (1 << 7)
87 #define SPIFI_CAP_NOBLOCK (1 << 16)
92 #define SPIFI_OPT_USE_DUAL (3 << 0)
93 #define SPIFI_OPT_USE_QUAD (3 << 2)
94 #define SPIFI_OPT_NOBLOCK (1 << 16)
99 #define SPIFI_STAT_BUSY (1 << 0)
100 #define SPIFI_STAT_ISWP (1 << 1)
101 #define SPIFI_STAT_FULLLOCK (1 << 2)
102 #define SPIFI_STAT_PARTLOCK (1 << 3)
103 #define SPIFI_STAT_PROGERR (1 << 4)
104 #define SPIFI_STAT_ERASEERR (1 << 5)
109 typedef enum {
110 SPIFI_INFO_BASE_ADDRESS = 0,
111 SPIFI_INFO_DEVSIZE,
112 SPIFI_INFO_ERASE_BLOCKS,
113 SPIFI_INFO_ERASE_BLOCKSIZE,
114 SPIFI_INFO_ERASE_SUBBLOCKS,
115 SPIFI_INFO_ERASE_SUBBLOCKSIZE,
116 SPIFI_INFO_PAGESIZE,
117 SPIFI_INFO_MAXREADSIZE,
118 SPIFI_INFO_MAXCLOCK,
119 SPIFI_INFO_MAX_READ_CLOCK,
120 SPIFI_INFO_MAX_HSREAD_CLOCK,
121 SPIFI_INFO_MAX_PROG_CLOCK,
122 SPIFI_INFO_MAX_HSPROG_CLOCK,
123 SPIFI_INFO_CAPS,
124 SPIFI_INFO_STATUS,
125 SPIFI_INFO_STATUS_RETAIN,
126 SPIFI_INFO_OPTIONS,
128 SPIFI_INFO_LASTINDEX
129 } SPIFI_INFO_ID_T;
130
134 #define SPIFI_INFO_QUADREAD_CLOCK SPIFI_INFO_MAX_HSREAD_CLOCK
135
139 #define SPIFI_INFO_QUADPROG_CLOCK SPIFI_INFO_MAX_HSPROG_CLOCK
140
143 typedef enum {
144 SPIFI_PCMD_UNLOCK_DEVICE = 0,
145 SPIFI_PCMD_LOCK_DEVICE,
146 SPIFI_PCMD_UNLOCK_BLOCK,
147 SPIFI_PCMD_LOCK_BLOCK
149 } SPIFI_PCMD_LOCK_UNLOCK_T;
150
154 typedef enum {
155 SPIFI_PCMD_ADDR_TO_SUB_BLOCK = 0,
156 SPIFI_PCMD_SUB_BLOCK_TO_ADDR,
157 SPIFI_PCMD_BLOCK_TO_SUB_BLOCK
159 } SPIFI_PCMD_SUBBLK_T;
160
164 typedef enum {
165 FX_spifiDeviceDataInitDeinit = 0,
166 FX_spifiDeviceDataInitDeinitS25FL164K,
168 FX_spifiDeviceDataClearStatusNone,
169 FX_spifiDeviceDataClearStatusS25FL032P,
171 FX_spifiDeviceDataGetStatusS25FL032P,
172 FX_spifiDeviceDataGetStatusS25FL164K,
173 FX_spifiDeviceDataGetStatusMX25L3235E,
174 FX_spifiDeviceDataGetStatusW25Q80BV,
176 FX_spifiDeviceDataSetStatusS25FL032P,
177 FX_spifiDeviceDataSetStatusS25FL164K,
178 FX_spifiDeviceDataSetStatusMX25L3235E,
180 FX_spifiDeviceDataSetOptsQuadModeBit9,
181 FX_spifiDeviceDataSetOptsQuadModeBit6,
183 FX_spifiDeviceInitReadCommand,
184 FX_spifiDevice4BInitReadCommand,
186 FX_spifiDeviceInitWriteCommand,
187 FX_spifiDevice4BInitWriteCommand,
188 FX_spifiDeviceInitWriteCommandMacronix
190 } SPIFI_DEVFX_T;
191
192 /* Forward type declaration */
193 struct SPIFI_HANDLE;
194
195 struct SPIFI_DEVICE_DATA;
196
197 struct SPIFI_FAM_DESC;
198
199 struct SPIFI_DEVICE_ID;
200
204 typedef struct SPIFI_FAM_NODE {
205 const struct SPIFI_FAM_DESC *pDesc;
207 struct SPIFI_FAM_NODE *pNext;
209 } SPIFI_FAM_NODE_T;
210
214 typedef struct SPIFI_FAM_DESC {
215 const char *pFamName;
216 struct SPIFI_DEV_NODE *pDevList;
218 uint32_t prvContextSize;
219 uint32_t *pDevCount;
220 void (*pPrvDevGetID)(uint32_t baseAddr, struct SPIFI_DEVICE_ID *pID);
222 SPIFI_ERR_T (*pPrvDevSetup)(struct SPIFI_HANDLE *pHandle, uint32_t spifiCtrlAddr, uint32_t baseAddr);
224 } SPIFI_FAM_DESC_T;
225
229 typedef struct SPIFI_DEV_NODE {
230 const struct SPIFI_DEVICE_DATA *pDevData;
232 struct SPIFI_DEV_NODE *pNext;
234 } SPIFI_DEV_NODE_T;
235
236 typedef SPIFI_ERR_T (*deviceInitDeInitFx)(const struct SPIFI_HANDLE *, uint32_t);
238 typedef void (*devClearStatusFx)(const struct SPIFI_HANDLE *);
240 typedef uint32_t (*devGetStatusFx)(const struct SPIFI_HANDLE *);
242 typedef void (*devSetStatusFx)(const struct SPIFI_HANDLE *, uint32_t);
244 typedef SPIFI_ERR_T (*devSetOptsFx)(const struct SPIFI_HANDLE *, uint32_t, uint32_t);
246 typedef void (*devGetReadCmdFx)(const struct SPIFI_HANDLE *, uint8_t, uint32_t *, uint32_t *);
248 typedef void (*devGetWriteCmdFx)(const struct SPIFI_HANDLE *, uint32_t *);
253 typedef struct SPIFI_FAM_FX {
254 /* Device init and de-initialization */
255
256 SPIFI_ERR_T (*lockCmd)(const struct SPIFI_HANDLE *, SPIFI_PCMD_LOCK_UNLOCK_T, uint32_t);
258 SPIFI_ERR_T (*eraseAll)(const struct SPIFI_HANDLE *);
260 SPIFI_ERR_T (*eraseBlock)(const struct SPIFI_HANDLE *, uint32_t);
262 SPIFI_ERR_T (*eraseSubBlock)(const struct SPIFI_HANDLE *, uint32_t);
264 SPIFI_ERR_T (*pageProgram)(const struct SPIFI_HANDLE *, uint32_t, const uint32_t *, uint32_t);
266 SPIFI_ERR_T (*read)(const struct SPIFI_HANDLE *, uint32_t, uint32_t *, uint32_t);
268 SPIFI_ERR_T (*reset)(const struct SPIFI_HANDLE *);
270 /* Info query functions */
271 uint32_t (*getStatus)(const struct SPIFI_HANDLE *, uint8_t);
273 uint32_t (*subBlockCmd)(const struct SPIFI_HANDLE *, SPIFI_PCMD_SUBBLK_T, uint32_t);
275 /* Device specific functions */
276 deviceInitDeInitFx devInitDeInit;
277 devClearStatusFx devClearStatus;
278 devGetStatusFx devGetStatus;
279 devSetStatusFx devSetStatus;
280 devSetOptsFx devSetOpts;
281 devGetReadCmdFx devGetReadCmd;
282 devGetWriteCmdFx devGetWriteCmd;
283 } SPIFI_FAM_FX_T;
284
288 typedef struct SPIFI_DEVICE_ID {
289 uint8_t mfgId[3];
290 uint8_t extCount;
291 uint8_t extId[8];
292 } SPIFI_DEVICE_ID_T;
293
297 typedef struct SPIFI_DEVICE_DATA {
298 const char *pDevName;
299 SPIFI_DEVICE_ID_T id;
300 uint32_t caps;
301 uint16_t blks;
302 uint32_t blkSize;
303 uint16_t subBlks;
304 uint16_t subBlkSize;
305 uint16_t pageSize;
306 uint32_t maxReadSize;
307 uint8_t maxClkRate;
308 uint8_t maxReadRate;
309 uint8_t maxHSReadRate;
310 uint8_t maxProgramRate;
311 uint8_t maxHSProgramRate;
312 uint8_t initDeInitFxId;
313 uint8_t clearStatusFxId;
314 uint8_t getStatusFxId;
315 uint8_t setStatusFxId;
316 uint8_t setOptionsFxId;
317 uint8_t getReadCmdFxId;
318 uint8_t getWriteCmdFxId;
319 } SPIFI_DEVICE_DATA_T;
320
324 typedef struct SPIFI_HANDLE {
325 const struct SPIFI_FAM_FX *pFamFx;
327 struct SPIFI_INFODATA *pInfoData;
329 void *pDevContext;
330 } SPIFI_HANDLE_T;
331
335 typedef struct SPIFI_INFODATA {
336 uint32_t spifiCtrlAddr;
337 uint32_t baseAddr;
338 uint32_t numBlocks;
339 uint32_t blockSize;
340 uint32_t numSubBlocks;
341 uint32_t subBlockSize;
342 uint32_t pageSize;
343 uint32_t maxReadSize;
344 const struct SPIFI_DEVICE_DATA *pDeviceData;
346 uint32_t opts;
347 const char *pDevName;
348 SPIFI_ERR_T lastErr;
349 const SPIFI_DEVICE_ID_T *pId;
350 } SPIFI_INFODATA_T;
351
355 typedef struct SPIFI_DEV_ENUMERATOR {
356 SPIFI_FAM_NODE_T *pFamily;
357 SPIFI_DEV_NODE_T *pDevice;
358 } SPIFI_DEV_ENUMERATOR_T;
359
377 SPIFI_FAM_NODE_T *spifi_REG_FAMILY_CommonCommandSet(void);
378
382 #define SPIFI_REG_FAMILY_Spansion_2Byte_PStatus spifi_REG_FAMILY_CommonCommandSet
383
387 #define SPIFI_REG_FAMILY_Spansion_3Byte_Status spifi_REG_FAMILY_CommonCommandSet
388
392 #define SPIFI_REG_FAMILY_Macronix_2Byte_Status spifi_REG_FAMILY_CommonCommandSet
393
397 #define SPIFI_REG_FAMILY_SpansionS25FLP spifi_REG_FAMILY_CommonCommandSet
398
402 #define SPIFI_REG_FAMILY_SpansionS25FL1 spifi_REG_FAMILY_CommonCommandSet
403
407 #define SPIFI_REG_FAMILY_MacronixMX25L spifi_REG_FAMILY_CommonCommandSet
408
412 #ifdef __cplusplus
413 }
414 #endif
415
416 #endif /* __SPIFILIB_DEV_H_ */