LPCOpen Platform for LPC18XX/43XX microcontrollers: LPC_CCAN_T Struct Reference

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LPC_CCAN_T Struct Reference
CHIP: LPC18xx/43xx CCAN driver

## Detailed Description

CCAN Controller Area Network register block structure.

Definition at line 65 of file ccan_18xx_43xx.h.

`#include "ccan_18xx_43xx.h"`

## Data Fields
__IO uint32_t | CNTL
__IO uint32_t | STAT
__I uint32_t | EC
__IO uint32_t | BT
__I uint32_t | INT
__IO uint32_t | TEST
__IO uint32_t | BRPE
__I uint32_t | RESERVED0
CCAN_IF_T | IF [2]
__I uint32_t | RESERVED2 [8]
__I uint32_t | TXREQ1
__I uint32_t | TXREQ2
__I uint32_t | RESERVED3 [6]
__I uint32_t | ND1
__I uint32_t | ND2
__I uint32_t | RESERVED4 [6]
__I uint32_t | IR1
__I uint32_t | IR2
__I uint32_t | RESERVED5 [6]
__I uint32_t | MSGV1
__I uint32_t | MSGV2
__I uint32_t | RESERVED6 [6]
__IO uint32_t | CLKDIV

## Field Documentation

__IO uint32_t BRPE

Baud rate prescaler extension register

Definition at line 72 of file ccan_18xx_43xx.h.

__IO uint32_t BT

Bit timing register

Definition at line 69 of file ccan_18xx_43xx.h.

__IO uint32_t CLKDIV

CAN clock divider register

Definition at line 88 of file ccan_18xx_43xx.h.

__IO uint32_t CNTL

< C_CAN Structure CAN control

Definition at line 66 of file ccan_18xx_43xx.h.

__I uint32_t EC

Error counter

Definition at line 68 of file ccan_18xx_43xx.h.

CCAN_IF_T IF[2]

Definition at line 74 of file ccan_18xx_43xx.h.

__I uint32_t INT

Interrupt register

Definition at line 70 of file ccan_18xx_43xx.h.

__I uint32_t IR1

Interrupt pending 1

Definition at line 82 of file ccan_18xx_43xx.h.

__I uint32_t IR2

Interrupt pending 2

Definition at line 83 of file ccan_18xx_43xx.h.

__I uint32_t MSGV1

Message valid 1

Definition at line 85 of file ccan_18xx_43xx.h.

__I uint32_t MSGV2

Message valid 2

Definition at line 86 of file ccan_18xx_43xx.h.

__I uint32_t ND1

New data 1

Definition at line 79 of file ccan_18xx_43xx.h.

__I uint32_t ND2

New data 2

Definition at line 80 of file ccan_18xx_43xx.h.

__I uint32_t RESERVED0

Definition at line 73 of file ccan_18xx_43xx.h.

__I uint32_t RESERVED2[8]

Definition at line 75 of file ccan_18xx_43xx.h.

__I uint32_t RESERVED3[6]

Definition at line 78 of file ccan_18xx_43xx.h.

__I uint32_t RESERVED4[6]

Definition at line 81 of file ccan_18xx_43xx.h.

__I uint32_t RESERVED5[6]

Definition at line 84 of file ccan_18xx_43xx.h.

__I uint32_t RESERVED6[6]

Definition at line 87 of file ccan_18xx_43xx.h.

__IO uint32_t STAT

Status register

Definition at line 67 of file ccan_18xx_43xx.h.

__IO uint32_t TEST

Test register

Definition at line 71 of file ccan_18xx_43xx.h.

__I uint32_t TXREQ1

Transmission request 1

Definition at line 76 of file ccan_18xx_43xx.h.

__I uint32_t TXREQ2

Transmission request 2

Definition at line 77 of file ccan_18xx_43xx.h.

The documentation for this struct was generated from the following file:

- C:/w/lpcopen_docs/software/lpc_core/lpc_chip/chip_18xx_43xx/ccan_18xx_43xx.h