LPCOpen Platform for LPC18XX/43XX microcontrollers  18XX43XX
LPCOpen Platform for the NXP LPC18XX/43XX family of Microcontrollers
fmc_18xx_43xx.h
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1 /*
2  * @brief LPC18xx/43xx FLASH Memory Controller (FMC) driver
3  *
4  * @note
5  * Copyright(C) NXP Semiconductors, 2013
6  * All rights reserved.
7  *
8  * @par
9  * Software that is described herein is for illustrative purposes only
10  * which provides customers with programming information regarding the
11  * LPC products. This software is supplied "AS IS" without any warranties of
12  * any kind, and NXP Semiconductors and its licensor disclaim any and
13  * all warranties, express or implied, including all implied warranties of
14  * merchantability, fitness for a particular purpose and non-infringement of
15  * intellectual property rights. NXP Semiconductors assumes no responsibility
16  * or liability for the use of the software, conveys no license or rights under any
17  * patent, copyright, mask work right, or any other intellectual property rights in
18  * or to any products. NXP Semiconductors reserves the right to make changes
19  * in the software without notification. NXP Semiconductors also makes no
20  * representation or warranty that such application will be suitable for the
21  * specified use without further testing or modification.
22  *
23  * @par
24  * Permission to use, copy, modify, and distribute this software and its
25  * documentation is hereby granted, under NXP Semiconductors' and its
26  * licensor's relevant copyrights in the software, without fee, provided that it
27  * is used in conjunction with NXP Semiconductors microcontrollers. This
28  * copyright, permission, and disclaimer notice must appear in all copies of
29  * this code.
30  */
31 
32 #ifndef __FMC_18XX_43XX_H_
33 #define __FMC_18XX_43XX_H_
34 
35 #ifdef __cplusplus
36 extern "C" {
37 #endif
38 
47 typedef struct {
48  __I uint32_t RESERVED1[8];
49  __IO uint32_t FMSSTART;
50  __IO uint32_t FMSSTOP;
51  __I uint32_t RESERVED2;
52  __I uint32_t FMSW[4];
53  __I uint32_t RESERVED3[1001];
54  __I uint32_t FMSTAT;
55  __I uint32_t RESERVED5;
56  __O uint32_t FMSTATCLR;
57  __I uint32_t RESERVED4[5];
58 } LPC_FMC_T;
59 
60 /* Flash signature start and busy status bit */
61 #define FMC_FLASHSIG_BUSY (1UL << 17)
62 
63 /* Flash signature clear status bit */
64 #define FMC_FLASHSIG_STAT (1 << 2)
65 
77 STATIC INLINE void Chip_FMC_ComputeSignature(uint8_t bank, uint32_t start, uint32_t stop)
78 {
79  LPC_FMC[bank]->FMSSTART = (start >> 4);
80  LPC_FMC[bank]->FMSTATCLR = FMC_FLASHSIG_STAT;
81  LPC_FMC[bank]->FMSSTOP = (stop >> 4) | FMC_FLASHSIG_BUSY;
82 }
83 
95 STATIC INLINE void Chip_FMC_ComputeSignatureBlocks(uint8_t bank, uint32_t start, uint32_t blocks)
96 {
97  Chip_FMC_ComputeSignature(bank, start, (start + (blocks * 16)));
98 }
99 
106 {
107  LPC_FMC[bank]->FMSTATCLR = FMC_FLASHSIG_STAT;
108 }
109 
116 {
117  return (bool) ((LPC_FMC[bank]->FMSTAT & FMC_FLASHSIG_STAT) == 0);
118 }
119 
126 STATIC INLINE uint32_t Chip_FMC_GetSignature(uint8_t bank, int index)
127 {
128  return LPC_FMC[bank]->FMSW[index];
129 }
130 
135 #ifdef __cplusplus
136 }
137 #endif
138 
139 #endif /* __FMC_18XX_43XX_H_ */