32 #ifndef __TIMER_18XX_43XX_H_
33 #define __TIMER_18XX_43XX_H_
58 __I uint32_t RESERVED0[12];
63 #define TIMER_IR_CLR(n) _BIT(n)
66 #define TIMER_MATCH_INT(n) (_BIT((n) & 0x0F))
68 #define TIMER_CAP_INT(n) (_BIT((((n) & 0x0F) + 4)))
71 #define TIMER_ENABLE ((uint32_t) (1 << 0))
73 #define TIMER_RESET ((uint32_t) (1 << 1))
76 #define TIMER_INT_ON_MATCH(n) (_BIT(((n) * 3)))
78 #define TIMER_RESET_ON_MATCH(n) (_BIT((((n) * 3) + 1)))
80 #define TIMER_STOP_ON_MATCH(n) (_BIT((((n) * 3) + 2)))
83 #define TIMER_CAP_RISING(n) (_BIT(((n) * 3)))
85 #define TIMER_CAP_FALLING(n) (_BIT((((n) * 3) + 1)))
87 #define TIMER_INT_ON_CAP(n) (_BIT((((n) * 3) + 2)))
150 pTMR->
IR = (0x10 << capnum);
219 pTMR->
MR[matchnum] = matchval;
231 return pTMR->
CR[capnum];
389 typedef enum IP_TIMER_PIN_MATCH_STATE {
414 typedef enum IP_TIMER_CAP_SRC_STATE {
434 pTMR->
CTCR = (uint32_t) capSrc | ((uint32_t) capnum) << 2;