LPCOpen Platform for LPC18XX/43XX microcontrollers  18XX43XX
LPCOpen Platform for the NXP LPC18XX/43XX family of Microcontrollers
Data Structures | Macros | Enumerations | Functions
sct_18xx_43xx.h File Reference

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Data Structures

struct  LPC_SCT_T
 State Configurable Timer register block structure. More...
 

Macros

#define CONFIG_SCT_nEV   (16)
 
#define CONFIG_SCT_nRG   (16)
 
#define CONFIG_SCT_nOU   (16)
 
#define SCT_CONFIG_16BIT_COUNTER   0x00000000
 
#define SCT_CONFIG_32BIT_COUNTER   0x00000001
 
#define SCT_CONFIG_CLKMODE_BUSCLK   (0x0 << 1)
 
#define SCT_CONFIG_CLKMODE_SCTCLK   (0x1 << 1)
 
#define SCT_CONFIG_CLKMODE_INCLK   (0x2 << 1)
 
#define SCT_CONFIG_CLKMODE_INEDGECLK   (0x3 << 1)
 
#define SCT_CONFIG_NORELOADL_U   (0x1 << 7)
 
#define SCT_CONFIG_NORELOADH   (0x1 << 8)
 
#define SCT_CONFIG_AUTOLIMIT_L   (0x1 << 17)
 
#define SCT_CONFIG_AUTOLIMIT_H   (0x1 << 18)
 
#define COUNTUP_TO_LIMIT_THEN_CLEAR_TO_ZERO   0
 
#define COUNTUP_TO   LIMIT_THEN_COUNTDOWN_TO_ZERO 1
 
#define SCT_CTRL_STOP_L   (1 << 1)
 
#define SCT_CTRL_HALT_L   (1 << 2)
 
#define SCT_CTRL_CLRCTR_L   (1 << 3)
 
#define SCT_CTRL_BIDIR_L(x)   (((x) & 0x01) << 4)
 
#define SCT_CTRL_PRE_L(x)   (((x) & 0xFF) << 5)
 
#define COUNTUP_TO_LIMIT_THEN_CLEAR_TO_ZERO   0
 
#define COUNTUP_TO   LIMIT_THEN_COUNTDOWN_TO_ZERO 1
 
#define SCT_CTRL_STOP_H   (1 << 17)
 
#define SCT_CTRL_HALT_H   (1 << 18)
 
#define SCT_CTRL_CLRCTR_H   (1 << 19)
 
#define SCT_CTRL_BIDIR_H(x)   (((x) & 0x01) << 20)
 
#define SCT_CTRL_PRE_H(x)   (((x) & 0xFF) << 21)
 
#define SCT_RES_NOCHANGE   (0)
 
#define SCT_RES_SET_OUTPUT   (1)
 
#define SCT_RES_CLEAR_OUTPUT   (2)
 
#define SCT_RES_TOGGLE_OUTPUT   (3)
 

Enumerations

enum  CHIP_SCT_MATCH_REG_T {
  SCT_MATCH_0 = 0, SCT_MATCH_1 = 1, SCT_MATCH_2 = 2, SCT_MATCH_3 = 3,
  SCT_MATCH_4 = 4
}
 
enum  CHIP_SCT_EVENT_T {
  SCT_EVT_0 = (1 << 0), SCT_EVT_1 = (1 << 1), SCT_EVT_2 = (1 << 2), SCT_EVT_3 = (1 << 3),
  SCT_EVT_4 = (1 << 4)
}
 

Functions

STATIC INLINE void Chip_SCT_Config (LPC_SCT_T *pSCT, uint32_t value)
 Configures the State Configurable Timer. More...
 
void Chip_SCT_SetClrControl (LPC_SCT_T *pSCT, uint32_t value, FunctionalState ena)
 Set or Clear the Control register. More...
 
void Chip_SCT_SetConflictResolution (LPC_SCT_T *pSCT, uint8_t outnum, uint8_t value)
 Set the conflict resolution. More...
 
STATIC INLINE void Chip_SCT_SetCount (LPC_SCT_T *pSCT, uint32_t count)
 Set unified count value in State Configurable Timer. More...
 
STATIC INLINE void Chip_SCT_SetCountL (LPC_SCT_T *pSCT, uint16_t count)
 Set lower count value in State Configurable Timer. More...
 
STATIC INLINE void Chip_SCT_SetCountH (LPC_SCT_T *pSCT, uint16_t count)
 Set higher count value in State Configurable Timer. More...
 
STATIC INLINE void Chip_SCT_SetMatchCount (LPC_SCT_T *pSCT, CHIP_SCT_MATCH_REG_T n, uint32_t value)
 Set unified match count value in State Configurable Timer. More...
 
STATIC INLINE void Chip_SCT_SetControl (LPC_SCT_T *pSCT, uint32_t value)
 Set control register in State Configurable Timer. More...
 
STATIC INLINE void Chip_SCT_ClearControl (LPC_SCT_T *pSCT, uint32_t value)
 Clear control register in State Configurable Timer. More...
 
STATIC INLINE void Chip_SCT_SetMatchReload (LPC_SCT_T *pSCT, CHIP_SCT_MATCH_REG_T n, uint32_t value)
 Set unified match reload count value in State Configurable Timer. More...
 
STATIC INLINE void Chip_SCT_EnableEventInt (LPC_SCT_T *pSCT, CHIP_SCT_EVENT_T evt)
 Enable the interrupt for the specified event in State Configurable Timer. More...
 
STATIC INLINE void Chip_SCT_DisableEventInt (LPC_SCT_T *pSCT, CHIP_SCT_EVENT_T evt)
 Disable the interrupt for the specified event in State Configurable Timer. More...
 
STATIC INLINE void Chip_SCT_ClearEventFlag (LPC_SCT_T *pSCT, CHIP_SCT_EVENT_T evt)
 Clear the specified event flag in State Configurable Timer. More...
 
void Chip_SCT_Init (LPC_SCT_T *pSCT)
 Initializes the State Configurable Timer. More...
 
void Chip_SCT_DeInit (LPC_SCT_T *pSCT)
 Deinitializes the State Configurable Timer. More...