LPCOpen Platform for LPC18XX/43XX microcontrollers  18XX43XX
LPCOpen Platform for the NXP LPC18XX/43XX family of Microcontrollers
chip_clocks.h
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1 /*
2  * @brief LPC18xx/43xx chip clock list used by CGU and CCU drivers
3  *
4  * @note
5  * Copyright(C) NXP Semiconductors, 2012
6  * All rights reserved.
7  *
8  * @par
9  * Software that is described herein is for illustrative purposes only
10  * which provides customers with programming information regarding the
11  * LPC products. This software is supplied "AS IS" without any warranties of
12  * any kind, and NXP Semiconductors and its licensor disclaim any and
13  * all warranties, express or implied, including all implied warranties of
14  * merchantability, fitness for a particular purpose and non-infringement of
15  * intellectual property rights. NXP Semiconductors assumes no responsibility
16  * or liability for the use of the software, conveys no license or rights under any
17  * patent, copyright, mask work right, or any other intellectual property rights in
18  * or to any products. NXP Semiconductors reserves the right to make changes
19  * in the software without notification. NXP Semiconductors also makes no
20  * representation or warranty that such application will be suitable for the
21  * specified use without further testing or modification.
22  *
23  * @par
24  * Permission to use, copy, modify, and distribute this software and its
25  * documentation is hereby granted, under NXP Semiconductors' and its
26  * licensor's relevant copyrights in the software, without fee, provided that it
27  * is used in conjunction with NXP Semiconductors microcontrollers. This
28  * copyright, permission, and disclaimer notice must appear in all copies of
29  * this code.
30  */
31 
32 #ifndef __CHIP_CLOCKS_H_
33 #define __CHIP_CLOCKS_H_
34 
35 #ifdef __cplusplus
36 extern "C" {
37 #endif
38 
49 typedef enum CHIP_CGU_CLKIN {
69 
78 typedef enum CHIP_CGU_BASE_CLK {
81 #if defined(CHIP_LPC43XX)
82  CLK_BASE_PERIPH,
83 #else
85 #endif
89 #if defined(CHIP_LPC43XX)
90  CLK_BASE_SPI,
91 #else
93 #endif
99 #if defined(CHIP_LPC43XX)
100  CLK_BASE_ADCHS,
101 #else
103 #endif
122 
131 typedef enum CHIP_CGU_IDIV {
139 
140 #define CHIP_CGU_IDIV_MASK(x) ("\x03\x0F\x0F\x0F\xFF"[x])
141 
149 typedef enum CHIP_CCU_CLK {
150  /* CCU1 clocks */
162  CLK_SPIFI = 64,
163  CLK_MX_BUS = 96,
179 #if defined(CHIP_LPC43XX)
180  CLK_M4_M0APP,
181  CLK_MX_ADCHS,
182 #else
185 #endif
187  CLK_MX_WWDT = 128,
202 #if defined(CHIP_LPC43XX)
203  CLK_PERIPH_BUS = 192,
205  CLK_PERIPH_CORE,
206  CLK_PERIPH_SGPIO,
207 #else
212 #endif
213  CLK_USB0 = 224,
214  CLK_USB1 = 256,
215 #if defined(CHIP_LPC43XX)
216  CLK_SPI = 288,
217  CLK_ADCHS = 320,
218 #else
221 #endif
223 
224  /* CCU2 clocks */
243 
248 #ifdef __cplusplus
249 }
250 #endif
251 
252 #endif /* __CHIP_CLOCKS_H_ */