LPCOpen Platform for LPC18XX/43XX microcontrollers: CHIP: LPC18xx/43xx I2S driver

| LPCOpen Platform for LPC18XX/43XX microcontrollers 18XX43XX LPCOpen Platform for the NXP LPC18XX/43XX family of Microcontrollers

- Main Page
- Modules
- Data Structures
- Files

Data Structures | Macros | Enumerations | Functions
CHIP: LPC18xx/43xx I2S driver
LPC18xx/43xx chip specific drivers

## Detailed Description

## Data Structures
struct | LPC_I2S_T
| I2S register block structure. More...
struct | I2S_AUDIO_FORMAT_T
| I2S Audio Format Structure. More...

## Macros
#define | I2S_WORDWIDTH_8 (0UL << 0)
#define | I2S_WORDWIDTH_16 (1UL << 0)
#define | I2S_WORDWIDTH_32 (3UL << 0)
#define | I2S_STEREO (0UL << 2)
#define | I2S_MONO (1UL << 2)
#define | I2S_MASTER_MODE (0UL << 5)
#define | I2S_SLAVE_MODE (1UL << 5)
#define | I2S_STOP_ENABLE (0UL << 3)
#define | I2S_STOP_DISABLE (1UL << 3)
#define | I2S_RESET_ENABLE (1UL << 4)
#define | I2S_RESET_DISABLE (0UL << 4)
#define | I2S_MUTE_ENABLE (1UL << 15)
#define | I2S_MUTE_DISABLE (0UL << 15)
#define | I2S_DAO_WORDWIDTH_8 ((uint32_t) (0))
#define | I2S_DAO_WORDWIDTH_16 ((uint32_t) (1))
#define | I2S_DAO_WORDWIDTH_32 ((uint32_t) (3))
#define | I2S_DAO_WORDWIDTH_MASK ((uint32_t) (3))
#define | I2S_DAO_MONO ((uint32_t) (1 << 2))
#define | I2S_DAO_STOP ((uint32_t) (1 << 3))
#define | I2S_DAO_RESET ((uint32_t) (1 << 4))
#define | I2S_DAO_SLAVE ((uint32_t) (1 << 5))
#define | I2S_DAO_WS_HALFPERIOD(n) ((uint32_t) (((n) & 0x1FF) << 6))
#define | I2S_DAO_WS_HALFPERIOD_MASK ((uint32_t) ((0x1FF) << 6))
#define | I2S_DAO_MUTE ((uint32_t) (1 << 15))
#define | I2S_DAI_WORDWIDTH_8 ((uint32_t) (0))
#define | I2S_DAI_WORDWIDTH_16 ((uint32_t) (1))
#define | I2S_DAI_WORDWIDTH_32 ((uint32_t) (3))
#define | I2S_DAI_WORDWIDTH_MASK ((uint32_t) (3))
#define | I2S_DAI_MONO ((uint32_t) (1 << 2))
#define | I2S_DAI_STOP ((uint32_t) (1 << 3))
#define | I2S_DAI_RESET ((uint32_t) (1 << 4))
#define | I2S_DAI_SLAVE ((uint32_t) (1 << 5))
#define | I2S_DAI_WS_HALFPERIOD(n) ((uint32_t) (((n) & 0x1FF) << 6))
#define | I2S_DAI_WS_HALFPERIOD_MASK ((uint32_t) ((0x1FF) << 6))
#define | I2S_STATE_IRQ ((uint32_t) (1))
#define | I2S_STATE_DMA1 ((uint32_t) (1 << 1))
#define | I2S_STATE_DMA2 ((uint32_t) (1 << 2))
#define | I2S_STATE_RX_LEVEL(n) ((uint32_t) ((n & 1F) << 8))
#define | I2S_STATE_TX_LEVEL(n) ((uint32_t) ((n & 1F) << 16))
#define | I2S_DMA1_RX_ENABLE ((uint32_t) (1))
#define | I2S_DMA1_TX_ENABLE ((uint32_t) (1 << 1))
#define | I2S_DMA1_RX_DEPTH(n) ((uint32_t) ((n & 0x1F) << 8))
#define | I2S_DMA1_TX_DEPTH(n) ((uint32_t) ((n & 0x1F) << 16))
#define | I2S_DMA2_RX_ENABLE ((uint32_t) (1))
#define | I2S_DMA2_TX_ENABLE ((uint32_t) (1 << 1))
#define | I2S_DMA2_RX_DEPTH(n) ((uint32_t) ((n & 0x1F) << 8))
#define | I2S_DMA2_TX_DEPTH(n) ((uint32_t) ((n & 0x1F) << 16))
#define | I2S_IRQ_RX_ENABLE ((uint32_t) (1))
#define | I2S_IRQ_TX_ENABLE ((uint32_t) (1 << 1))
#define | I2S_IRQ_RX_DEPTH(n) ((uint32_t) ((n & 0x0F) << 8))
#define | I2S_IRQ_RX_DEPTH_MASK ((uint32_t) ((0x0F) << 8))
#define | I2S_IRQ_TX_DEPTH(n) ((uint32_t) ((n & 0x0F) << 16))
#define | I2S_IRQ_TX_DEPTH_MASK ((uint32_t) ((0x0F) << 16))
#define | I2S_TXRATE_Y_DIVIDER(n) ((uint32_t) (n & 0xFF))
#define | I2S_TXRATE_X_DIVIDER(n) ((uint32_t) ((n & 0xFF) << 8))
#define | I2S_RXRATE_Y_DIVIDER(n) ((uint32_t) (n & 0xFF))
#define | I2S_RXRATE_X_DIVIDER(n) ((uint32_t) ((n & 0xFF) << 8))
#define | I2S_TXBITRATE(n) ((uint32_t) (n & 0x3F))
#define | I2S_RXBITRATE(n) ((uint32_t) (n & 0x3F))
#define | I2S_TXMODE_CLKSEL(n) ((uint32_t) (n & 0x03))
#define | I2S_TXMODE_4PIN_ENABLE ((uint32_t) (1 << 2))
#define | I2S_TXMODE_MCENA ((uint32_t) (1 << 3))
#define | I2S_RXMODE_CLKSEL(n) ((uint32_t) (n & 0x03))
#define | I2S_RXMODE_4PIN_ENABLE ((uint32_t) (1 << 2))
#define | I2S_RXMODE_MCENA ((uint32_t) (1 << 3))

## Enumerations
enum | I2S_DMA_CHANNEL_T { I2S_DMA_REQUEST_CHANNEL_1, I2S_DMA_REQUEST_CHANNEL_2, I2S_DMA_REQUEST_CHANNEL_NUM }
| I2S DMA request channel define. More...

## Functions
void | Chip_I2S_Init (LPC_I2S_T *pI2S)
| Initialize for I2S. More...
void | Chip_I2S_DeInit (LPC_I2S_T *pI2S)
| Shutdown I2S. More...
STATIC INLINE void | Chip_I2S_Send (LPC_I2S_T *pI2S, uint32_t data)
| Send a 32-bit data to TXFIFO for transmition. More...
STATIC INLINE uint32_t | Chip_I2S_Receive (LPC_I2S_T *pI2S)
| Get received data from RXFIFO. More...
STATIC INLINE void | Chip_I2S_TxStart (LPC_I2S_T *pI2S)
| Start transmit data. More...
STATIC INLINE void | Chip_I2S_RxStart (LPC_I2S_T *pI2S)
| Start receive data. More...
STATIC INLINE void | Chip_I2S_TxPause (LPC_I2S_T *pI2S)
| Disables accesses on FIFOs, places the transmit channel in mute mode. More...
STATIC INLINE void | Chip_I2S_RxPause (LPC_I2S_T *pI2S)
| Disables accesses on FIFOs, places the transmit channel in mute mode. More...
STATIC INLINE void | Chip_I2S_EnableMute (LPC_I2S_T *pI2S)
| Mute the Transmit channel. More...
STATIC INLINE void | Chip_I2S_DisableMute (LPC_I2S_T *pI2S)
| Un-Mute the I2S channel. More...
STATIC INLINE void | Chip_I2S_TxStop (LPC_I2S_T *pI2S)
| Stop I2S asynchronously. More...
STATIC INLINE void | Chip_I2S_RxStop (LPC_I2S_T *pI2S)
| Stop I2S asynchronously. More...
STATIC INLINE void | Chip_I2S_RxSlave (LPC_I2S_T *pI2S)
| Sets the I2S receive channel in slave mode. More...
STATIC INLINE void | Chip_I2S_TxSlave (LPC_I2S_T *pI2S)
| Sets the I2S transmit channel in slave mode. More...
STATIC INLINE void | Chip_I2S_TxModeConfig (LPC_I2S_T *pI2S, uint32_t clksel, uint32_t fpin, uint32_t mcena)
| Set the I2S transmit mode. More...
STATIC INLINE void | Chip_I2S_RxModeConfig (LPC_I2S_T *pI2S, uint32_t clksel, uint32_t fpin, uint32_t mcena)
| Set the I2S receive mode. More...
STATIC INLINE uint8_t | Chip_I2S_GetTxLevel (LPC_I2S_T *pI2S)
| Get the current level of the Transmit FIFO. More...
STATIC INLINE uint8_t | Chip_I2S_GetRxLevel (LPC_I2S_T *pI2S)
| Get the current level of the Receive FIFO. More...
STATIC INLINE void | Chip_I2S_SetTxBitRate (LPC_I2S_T *pI2S, uint32_t div)
| Set the clock frequency for I2S interface. More...
STATIC INLINE void | Chip_I2S_SetRxBitRate (LPC_I2S_T *pI2S, uint32_t div)
| Set the clock frequency for I2S interface. More...
STATIC INLINE void | Chip_I2S_SetTxXYDivider (LPC_I2S_T *pI2S, uint8_t xDiv, uint8_t yDiv)
| Set the MCLK rate by using a fractional rate generator, dividing down the frequency of PCLK. More...
STATIC INLINE void | Chip_I2S_SetRxXYDivider (LPC_I2S_T *pI2S, uint8_t xDiv, uint8_t yDiv)
| Set the MCLK rate by using a fractional rate generator, dividing down the frequency of PCLK. More...
Status | Chip_I2S_TxConfig (LPC_I2S_T *pI2S, I2S_AUDIO_FORMAT_T *format)
| Configure I2S for Audio Format input. More...
Status | Chip_I2S_RxConfig (LPC_I2S_T *pI2S, I2S_AUDIO_FORMAT_T *format)
| Configure I2S for Audio Format input. More...
void | Chip_I2S_Int_TxCmd (LPC_I2S_T *pI2S, FunctionalState newState, uint8_t depth)
| Enable/Disable Interrupt with a specific FIFO depth. More...
void | Chip_I2S_Int_RxCmd (LPC_I2S_T *pI2S, FunctionalState newState, uint8_t depth)
| Enable/Disable Interrupt with a specific FIFO depth. More...
void | Chip_I2S_DMA_TxCmd (LPC_I2S_T *pI2S, I2S_DMA_CHANNEL_T dmaNum, FunctionalState newState, uint8_t depth)
| Enable/Disable DMA with a specific FIFO depth. More...
void | Chip_I2S_DMA_RxCmd (LPC_I2S_T *pI2S, I2S_DMA_CHANNEL_T dmaNum, FunctionalState newState, uint8_t depth)
| Enable/Disable DMA with a specific FIFO depth. More...

## Macro Definition Documentation

#define I2S_DAI_MONO ((uint32_t) (1 << 2))

DAI mono mode mask

Definition at line 138 of file i2s_18xx_43xx.h.

#define I2S_DAI_RESET ((uint32_t) (1 << 4))

DAI reset bit mask

Definition at line 144 of file i2s_18xx_43xx.h.

#define I2S_DAI_SLAVE ((uint32_t) (1 << 5))

DAI slave mode mask

Definition at line 147 of file i2s_18xx_43xx.h.

#define I2S_DAI_STOP ((uint32_t) (1 << 3))

DAI stop bit mask

Definition at line 141 of file i2s_18xx_43xx.h.

#define I2S_DAI_WORDWIDTH_16 ((uint32_t) (1))

DAI 16 bit

Definition at line 133 of file i2s_18xx_43xx.h.

#define I2S_DAI_WORDWIDTH_32 ((uint32_t) (3))

DAI 32 bit

Definition at line 134 of file i2s_18xx_43xx.h.

#define I2S_DAI_WORDWIDTH_8 ((uint32_t) (0))

DAI 8 bit

Definition at line 132 of file i2s_18xx_43xx.h.

#define I2S_DAI_WORDWIDTH_MASK ((uint32_t) (3))

DAI word wide mask

Definition at line 135 of file i2s_18xx_43xx.h.

#define I2S_DAI_WS_HALFPERIOD | ( |  | n | ) | ((uint32_t) (((n) & 0x1FF) << 6))

DAI Word select set macro

Definition at line 150 of file i2s_18xx_43xx.h.

#define I2S_DAI_WS_HALFPERIOD_MASK ((uint32_t) ((0x1FF) << 6))

DAI Word select mask

Definition at line 151 of file i2s_18xx_43xx.h.

#define I2S_DAO_MONO ((uint32_t) (1 << 2))

DAO mono audio mask

Definition at line 110 of file i2s_18xx_43xx.h.

#define I2S_DAO_MUTE ((uint32_t) (1 << 15))

DAO mute mask

Definition at line 126 of file i2s_18xx_43xx.h.

#define I2S_DAO_RESET ((uint32_t) (1 << 4))

DAO reset mask

Definition at line 116 of file i2s_18xx_43xx.h.

#define I2S_DAO_SLAVE ((uint32_t) (1 << 5))

DAO slave mode mask

Definition at line 119 of file i2s_18xx_43xx.h.

#define I2S_DAO_STOP ((uint32_t) (1 << 3))

DAO stop mask

Definition at line 113 of file i2s_18xx_43xx.h.

#define I2S_DAO_WORDWIDTH_16 ((uint32_t) (1))

DAO 16 bit

Definition at line 105 of file i2s_18xx_43xx.h.

#define I2S_DAO_WORDWIDTH_32 ((uint32_t) (3))

DAO 32 bit

Definition at line 106 of file i2s_18xx_43xx.h.

#define I2S_DAO_WORDWIDTH_8 ((uint32_t) (0))

DAO 8 bit

Definition at line 104 of file i2s_18xx_43xx.h.

#define I2S_DAO_WORDWIDTH_MASK ((uint32_t) (3))

Definition at line 107 of file i2s_18xx_43xx.h.

#define I2S_DAO_WS_HALFPERIOD | ( |  | n | ) | ((uint32_t) (((n) & 0x1FF) << 6))

DAO Word select set macro

Definition at line 122 of file i2s_18xx_43xx.h.

#define I2S_DAO_WS_HALFPERIOD_MASK ((uint32_t) ((0x1FF) << 6))

DAO Word select mask

Definition at line 123 of file i2s_18xx_43xx.h.

#define I2S_DMA1_RX_DEPTH | ( |  | n | ) | ((uint32_t) ((n & 0x1F) << 8))

I2S set FIFO level that trigger a receive DMA request on DMA1

Definition at line 167 of file i2s_18xx_43xx.h.

#define I2S_DMA1_RX_ENABLE ((uint32_t) (1))

I2S control DMA1 for I2S receive

Definition at line 165 of file i2s_18xx_43xx.h.

#define I2S_DMA1_TX_DEPTH | ( |  | n | ) | ((uint32_t) ((n & 0x1F) << 16))

I2S set FIFO level that trigger a transmit DMA request on DMA1

Definition at line 168 of file i2s_18xx_43xx.h.

#define I2S_DMA1_TX_ENABLE ((uint32_t) (1 << 1))

I2S control DMA1 for I2S transmit

Definition at line 166 of file i2s_18xx_43xx.h.

#define I2S_DMA2_RX_DEPTH | ( |  | n | ) | ((uint32_t) ((n & 0x1F) << 8))

I2S set FIFO level that trigger a receive DMA request on DMA1

Definition at line 175 of file i2s_18xx_43xx.h.

#define I2S_DMA2_RX_ENABLE ((uint32_t) (1))

I2S control DMA2 for I2S receive

Definition at line 173 of file i2s_18xx_43xx.h.

#define I2S_DMA2_TX_DEPTH | ( |  | n | ) | ((uint32_t) ((n & 0x1F) << 16))

I2S set FIFO level that trigger a transmit DMA request on DMA1

Definition at line 176 of file i2s_18xx_43xx.h.

#define I2S_DMA2_TX_ENABLE ((uint32_t) (1 << 1))

I2S control DMA1 for I2S transmit

Definition at line 174 of file i2s_18xx_43xx.h.

#define I2S_IRQ_RX_DEPTH | ( |  | n | ) | ((uint32_t) ((n & 0x0F) << 8))

I2S set the FIFO level on which to create an irq request

Definition at line 184 of file i2s_18xx_43xx.h.

#define I2S_IRQ_RX_DEPTH_MASK ((uint32_t) ((0x0F) << 8))

Definition at line 185 of file i2s_18xx_43xx.h.

#define I2S_IRQ_RX_ENABLE ((uint32_t) (1))

I2S control I2S receive interrupt

Definition at line 182 of file i2s_18xx_43xx.h.

#define I2S_IRQ_TX_DEPTH | ( |  | n | ) | ((uint32_t) ((n & 0x0F) << 16))

I2S set the FIFO level on which to create an irq request

Definition at line 186 of file i2s_18xx_43xx.h.

#define I2S_IRQ_TX_DEPTH_MASK ((uint32_t) ((0x0F) << 16))

Definition at line 187 of file i2s_18xx_43xx.h.

#define I2S_IRQ_TX_ENABLE ((uint32_t) (1 << 1))

I2S control I2S transmit interrupt

Definition at line 183 of file i2s_18xx_43xx.h.

#define I2S_MASTER_MODE (0UL << 5)

I2S in master mode

Definition at line 85 of file i2s_18xx_43xx.h.

#define I2S_MONO (1UL << 2)

Mono audio

Definition at line 82 of file i2s_18xx_43xx.h.

#define I2S_MUTE_DISABLE (0UL << 15)

I2S mute disbale mask

Definition at line 98 of file i2s_18xx_43xx.h.

#define I2S_MUTE_ENABLE (1UL << 15)

I2S mute enable mask

Definition at line 97 of file i2s_18xx_43xx.h.

#define I2S_RESET_DISABLE (0UL << 4)

I2S reset disable mask

Definition at line 94 of file i2s_18xx_43xx.h.

#define I2S_RESET_ENABLE (1UL << 4)

I2S reset enable mask

Definition at line 93 of file i2s_18xx_43xx.h.

#define I2S_RXBITRATE | ( |  | n | ) | ((uint32_t) (n & 0x3F))

Definition at line 201 of file i2s_18xx_43xx.h.

#define I2S_RXMODE_4PIN_ENABLE ((uint32_t) (1 << 2))

I2S Receive control 4-pin mode

Definition at line 210 of file i2s_18xx_43xx.h.

#define I2S_RXMODE_CLKSEL | ( |  | n | ) | ((uint32_t) (n & 0x03))

I2S Receive select clock source

Definition at line 209 of file i2s_18xx_43xx.h.

#define I2S_RXMODE_MCENA ((uint32_t) (1 << 3))

I2S Receive control the TX_MCLK output

Definition at line 211 of file i2s_18xx_43xx.h.

#define I2S_RXRATE_X_DIVIDER | ( |  | n | ) | ((uint32_t) ((n & 0xFF) << 8))

I2S Receive MCLK rate denominator

Definition at line 195 of file i2s_18xx_43xx.h.

#define I2S_RXRATE_Y_DIVIDER | ( |  | n | ) | ((uint32_t) (n & 0xFF))

I2S Receive MCLK rate denominator

Definition at line 194 of file i2s_18xx_43xx.h.

#define I2S_SLAVE_MODE (1UL << 5)

I2S in slave mode

Definition at line 86 of file i2s_18xx_43xx.h.

#define I2S_STATE_DMA1 ((uint32_t) (1 << 1))

I2S Status Receive or Transmit DMA1

Definition at line 157 of file i2s_18xx_43xx.h.

#define I2S_STATE_DMA2 ((uint32_t) (1 << 2))

I2S Status Receive or Transmit DMA2

Definition at line 158 of file i2s_18xx_43xx.h.

#define I2S_STATE_IRQ ((uint32_t) (1))

I2S Status Receive or Transmit Interrupt

Definition at line 156 of file i2s_18xx_43xx.h.

#define I2S_STATE_RX_LEVEL | ( |  | n | ) | ((uint32_t) ((n & 1F) << 8))

I2S Status Current level of the Receive FIFO (5 bits)

Definition at line 159 of file i2s_18xx_43xx.h.

#define I2S_STATE_TX_LEVEL | ( |  | n | ) | ((uint32_t) ((n & 1F) << 16))

I2S Status Current level of the Transmit FIFO (5 bits)

Definition at line 160 of file i2s_18xx_43xx.h.

#define I2S_STEREO (0UL << 2)

Stereo audio

Definition at line 81 of file i2s_18xx_43xx.h.

#define I2S_STOP_DISABLE (1UL << 3)

I2S stop disable mask

Definition at line 90 of file i2s_18xx_43xx.h.

#define I2S_STOP_ENABLE (0UL << 3)

I2S stop enable mask

Definition at line 89 of file i2s_18xx_43xx.h.

#define I2S_TXBITRATE | ( |  | n | ) | ((uint32_t) (n & 0x3F))

Definition at line 200 of file i2s_18xx_43xx.h.

#define I2S_TXMODE_4PIN_ENABLE ((uint32_t) (1 << 2))

I2S Transmit control 4-pin mode

Definition at line 207 of file i2s_18xx_43xx.h.

#define I2S_TXMODE_CLKSEL | ( |  | n | ) | ((uint32_t) (n & 0x03))

I2S Transmit select clock source (2 bits)

Definition at line 206 of file i2s_18xx_43xx.h.

#define I2S_TXMODE_MCENA ((uint32_t) (1 << 3))

I2S Transmit control the TX_MCLK output

Definition at line 208 of file i2s_18xx_43xx.h.

#define I2S_TXRATE_X_DIVIDER | ( |  | n | ) | ((uint32_t) ((n & 0xFF) << 8))

I2S Transmit MCLK rate denominator

Definition at line 193 of file i2s_18xx_43xx.h.

#define I2S_TXRATE_Y_DIVIDER | ( |  | n | ) | ((uint32_t) (n & 0xFF))

I2S Transmit MCLK rate denominator

Definition at line 192 of file i2s_18xx_43xx.h.

#define I2S_WORDWIDTH_16 (1UL << 0)

16 bit word

Definition at line 77 of file i2s_18xx_43xx.h.

#define I2S_WORDWIDTH_32 (3UL << 0)

32 bit word

Definition at line 78 of file i2s_18xx_43xx.h.

#define I2S_WORDWIDTH_8 (0UL << 0)

8 bit Word

Definition at line 76 of file i2s_18xx_43xx.h.

## Enumeration Type Documentation

enum I2S_DMA_CHANNEL_T

I2S DMA request channel define.

Enumerator
I2S_DMA_REQUEST_CHANNEL_1 | DMA request channel 1
I2S_DMA_REQUEST_CHANNEL_2 | DMA request channel 2
I2S_DMA_REQUEST_CHANNEL_NUM | The number of DMA request channels

Definition at line 47 of file i2s_18xx_43xx.h.

## Function Documentation

void Chip_I2S_DeInit | ( | LPC_I2S_T * | pI2S | ) |

Shutdown I2S.

Parameters

  pI2S | : The base of I2S peripheral on the chip

Returns
  Nothing

Note
  Reset all relative registers (DMA, transmit/receive control, interrupt) to default value

Definition at line 117 of file i2s_18xx_43xx.c.

STATIC INLINE void Chip_I2S_DisableMute | ( | LPC_I2S_T * | pI2S | ) |

Un-Mute the I2S channel.

Parameters

  pI2S | : The base of I2S peripheral on the chip

Returns
  Nothing

Definition at line 316 of file i2s_18xx_43xx.h.

void Chip_I2S_DMA_RxCmd | ( | LPC_I2S_T * | pI2S,
|  | I2S_DMA_CHANNEL_T | dmaNum,
|  | FunctionalState | newState,
|  | uint8_t | depth
| ) |  |

Enable/Disable DMA with a specific FIFO depth.

Parameters

  pI2S | : The base I2S peripheral on the chip
  dmaNum | : Should be I2S_DMA_REQUEST_CHANNEL_1 : Using DMA1 I2S_DMA_REQUEST_CHANNEL_2 : Using DMA2
  newState | : ENABLE or DISABLE interrupt
  depth | : FIFO level creating an irq request

Returns
  Nothing

Definition at line 241 of file i2s_18xx_43xx.c.

void Chip_I2S_DMA_TxCmd | ( | LPC_I2S_T * | pI2S,
|  | I2S_DMA_CHANNEL_T | dmaNum,
|  | FunctionalState | newState,
|  | uint8_t | depth
| ) |  |

Enable/Disable DMA with a specific FIFO depth.

Parameters

  pI2S | : The base I2S peripheral on the chip
  dmaNum | : Should be I2S_DMA_REQUEST_CHANNEL_1 : Using DMA1 I2S_DMA_REQUEST_CHANNEL_2 : Using DMA2
  newState | : ENABLE or DISABLE interrupt
  depth | : FIFO level creating an irq request

Returns
  Nothing

Definition at line 223 of file i2s_18xx_43xx.c.

STATIC INLINE void Chip_I2S_EnableMute | ( | LPC_I2S_T * | pI2S | ) |

Mute the Transmit channel.

Parameters

  pI2S | : The base of I2S peripheral on the chip

Returns
  Nothing

Note
  The data output from I2S transmit channel is always zeroes

Definition at line 306 of file i2s_18xx_43xx.h.

STATIC INLINE uint8_t Chip_I2S_GetRxLevel | ( | LPC_I2S_T * | pI2S | ) |

Get the current level of the Receive FIFO.

Parameters

  pI2S | : The base of I2S peripheral on the chip

Returns
  Current level of the Receive FIFO

Definition at line 425 of file i2s_18xx_43xx.h.

STATIC INLINE uint8_t Chip_I2S_GetTxLevel | ( | LPC_I2S_T * | pI2S | ) |

Get the current level of the Transmit FIFO.

Parameters

  pI2S | : The base of I2S peripheral on the chip

Returns
  Current level of the Transmit FIFO

Definition at line 415 of file i2s_18xx_43xx.h.

void Chip_I2S_Init | ( | LPC_I2S_T * | pI2S | ) |

Initialize for I2S.

Parameters

  pI2S | : The base of I2S peripheral on the chip

Returns
  Nothing

Definition at line 111 of file i2s_18xx_43xx.c.

void Chip_I2S_Int_RxCmd | ( | LPC_I2S_T * | pI2S,
|  | FunctionalState | newState,
|  | uint8_t | depth
| ) |  |

Enable/Disable Interrupt with a specific FIFO depth.

Parameters

  pI2S | : The base I2S peripheral on the chip
  newState | : ENABLE or DISABLE interrupt
  depth | : FIFO level creating an irq request

Returns
  Nothing

Definition at line 208 of file i2s_18xx_43xx.c.

void Chip_I2S_Int_TxCmd | ( | LPC_I2S_T * | pI2S,
|  | FunctionalState | newState,
|  | uint8_t | depth
| ) |  |

Enable/Disable Interrupt with a specific FIFO depth.

Parameters

  pI2S | : The base I2S peripheral on the chip
  newState | : ENABLE or DISABLE interrupt
  depth | : FIFO level creating an irq request

Returns
  Nothing

Definition at line 193 of file i2s_18xx_43xx.c.

STATIC INLINE uint32_t Chip_I2S_Receive | ( | LPC_I2S_T * | pI2S | ) |

Get received data from RXFIFO.

Parameters

  pI2S | : The base of I2S peripheral on the chip

Returns
  Data received in RXFIFO

Note
  The function reads from RXFIFO without checking any condition.

Definition at line 255 of file i2s_18xx_43xx.h.

Status Chip_I2S_RxConfig | ( | LPC_I2S_T * | pI2S,
|  | I2S_AUDIO_FORMAT_T * | format
| ) |  |

Configure I2S for Audio Format input.

Parameters

  pI2S | : The base I2S peripheral on the chip
  format | : Audio Format

Returns
  SUCCESS or ERROR

Definition at line 162 of file i2s_18xx_43xx.c.

STATIC INLINE void Chip_I2S_RxModeConfig | ( | LPC_I2S_T * | pI2S,
|  | uint32_t | clksel,
|  | uint32_t | fpin,
|  | uint32_t | mcena
| ) |  |

Set the I2S receive mode.

Parameters

  pI2S | : The base of I2S peripheral on the chip
  clksel | : Clock source selection for the receive bit clock divider
  fpin | : Receive 4-pin mode selection
  mcena | : Enable for the RX_MCLK output

Returns
  Nothing

Note
  In addition to master and slave modes, which are independently configurable for the transmitter and the receiver, several different clock sources are possible, including variations that share the clock and/or WS between the transmitter and receiver. It also allows using I2S with fewer pins, typically four.

Definition at line 402 of file i2s_18xx_43xx.h.

STATIC INLINE void Chip_I2S_RxPause | ( | LPC_I2S_T * | pI2S | ) |

Disables accesses on FIFOs, places the transmit channel in mute mode.

Parameters

  pI2S | : The base of I2S peripheral on the chip

Returns
  Nothing

Definition at line 295 of file i2s_18xx_43xx.h.

STATIC INLINE void Chip_I2S_RxSlave | ( | LPC_I2S_T * | pI2S | ) |

Sets the I2S receive channel in slave mode.

Parameters

  pI2S | : The base of I2S peripheral on the chip

Returns
  Nothing

Note
  4 pin mode must be enabled on appropriate channel. Must be called after each Chip_I2S_TxModeConfig call if slave mode is needed.

Definition at line 352 of file i2s_18xx_43xx.h.

STATIC INLINE void Chip_I2S_RxStart | ( | LPC_I2S_T * | pI2S | ) |

Start receive data.

Parameters

  pI2S | : The base of I2S peripheral on the chip

Returns
  Nothing

Definition at line 275 of file i2s_18xx_43xx.h.

STATIC INLINE void Chip_I2S_RxStop | ( | LPC_I2S_T * | pI2S | ) |

Stop I2S asynchronously.

Parameters

  pI2S | : The base of I2S peripheral on the chip

Returns
  Nothing

Note
  Pause, resets the transmit channel and FIFO asynchronously

Definition at line 339 of file i2s_18xx_43xx.h.

STATIC INLINE void Chip_I2S_Send | ( | LPC_I2S_T * | pI2S,
|  | uint32_t | data
| ) |  |

Send a 32-bit data to TXFIFO for transmition.

Parameters

  pI2S | : The base of I2S peripheral on the chip
  data | : Data to be transmited

Returns
  Nothing

Note
  The function writes to TXFIFO without checking any condition.

Definition at line 244 of file i2s_18xx_43xx.h.

STATIC INLINE void Chip_I2S_SetRxBitRate | ( | LPC_I2S_T * | pI2S,
|  | uint32_t | div
| ) |  |

Set the clock frequency for I2S interface.

Parameters

  pI2S | : The base of I2S peripheral on the chip
  div | : Clock divider. This value plus one is used to divide MCLK to produce the clock frequency for I2S interface

Returns
  Nothing

Note
  The value depends on the audio sample rate desired and the data size and format(stereo/mono) used. For example, a 48 kHz sample rate for 16-bit stereo data requires a bit rate of 48 000 x 16 x 2 = 1.536 MHz. So the mclk_divider should be MCLK/1.536 MHz

Definition at line 451 of file i2s_18xx_43xx.h.

STATIC INLINE void Chip_I2S_SetRxXYDivider | ( | LPC_I2S_T * | pI2S,
|  | uint8_t | xDiv,
|  | uint8_t | yDiv
| ) |  |

Set the MCLK rate by using a fractional rate generator, dividing down the frequency of PCLK.

Parameters

  pI2S | : The base of I2S peripheral on the chip
  xDiv | : I2S transmit MCLK rate numerator
  yDiv | : I2S transmit MCLK rate denominator

Returns
  Nothing

Note
  Values of the numerator (X) and the denominator (Y) must be chosen to produce a frequency twice that desired for the transmitter MCLK, which must be an integer multiple of the transmitter bit clock rate. The equation for the fractional rate generator is: MCLK = PCLK * (X/Y) /2 Note: If the value of X or Y is 0, then no clock is generated. Also, the value of Y must be greater than or equal to X.

Definition at line 489 of file i2s_18xx_43xx.h.

STATIC INLINE void Chip_I2S_SetTxBitRate | ( | LPC_I2S_T * | pI2S,
|  | uint32_t | div
| ) |  |

Set the clock frequency for I2S interface.

Parameters

  pI2S | : The base of I2S peripheral on the chip
  div | : Clock divider. This value plus one is used to divide MCLK to produce the clock frequency for I2S interface

Returns
  Nothing

Note
  The value depends on the audio sample rate desired and the data size and format(stereo/mono) used. For example, a 48 kHz sample rate for 16-bit stereo data requires a bit rate of 48 000 x 16 x 2 = 1.536 MHz. So the mclk_divider should be MCLK/1.536 MHz

Definition at line 438 of file i2s_18xx_43xx.h.

STATIC INLINE void Chip_I2S_SetTxXYDivider | ( | LPC_I2S_T * | pI2S,
|  | uint8_t | xDiv,
|  | uint8_t | yDiv
| ) |  |

Set the MCLK rate by using a fractional rate generator, dividing down the frequency of PCLK.

Parameters

  pI2S | : The base of I2S peripheral on the chip
  xDiv | : I2S transmit MCLK rate numerator
  yDiv | : I2S transmit MCLK rate denominator

Returns
  Nothing

Note
  Values of the numerator (X) and the denominator (Y) must be chosen to produce a frequency twice that desired for the transmitter MCLK, which must be an integer multiple of the transmitter bit clock rate. The equation for the fractional rate generator is: MCLK = PCLK * (X/Y) /2 Note: If the value of X or Y is 0, then no clock is generated. Also, the value of Y must be greater than or equal to X.

Definition at line 470 of file i2s_18xx_43xx.h.

Status Chip_I2S_TxConfig | ( | LPC_I2S_T * | pI2S,
|  | I2S_AUDIO_FORMAT_T * | format
| ) |  |

Configure I2S for Audio Format input.

Parameters

  pI2S | : The base I2S peripheral on the chip
  format | : Audio Format

Returns
  SUCCESS or ERROR

Definition at line 130 of file i2s_18xx_43xx.c.

STATIC INLINE void Chip_I2S_TxModeConfig | ( | LPC_I2S_T * | pI2S,
|  | uint32_t | clksel,
|  | uint32_t | fpin,
|  | uint32_t | mcena
| ) |  |

Set the I2S transmit mode.

Parameters

  pI2S | : The base of I2S peripheral on the chip
  clksel | : Clock source selection for the receive bit clock divider
  fpin | : Receive 4-pin mode selection
  mcena | : Enable for the RX_MCLK output

Returns
  Nothing

Note
  In addition to master and slave modes, which are independently configurable for the transmitter and the receiver, several different clock sources are possible, including variations that share the clock and/or WS between the transmitter and receiver. It also allows using I2S with fewer pins, typically four.

Definition at line 382 of file i2s_18xx_43xx.h.

STATIC INLINE void Chip_I2S_TxPause | ( | LPC_I2S_T * | pI2S | ) |

Disables accesses on FIFOs, places the transmit channel in mute mode.

Parameters

  pI2S | : The base of I2S peripheral on the chip

Returns
  Nothing

Definition at line 285 of file i2s_18xx_43xx.h.

STATIC INLINE void Chip_I2S_TxSlave | ( | LPC_I2S_T * | pI2S | ) |

Sets the I2S transmit channel in slave mode.

Parameters

  pI2S | : The base of I2S peripheral on the chip

Returns
  Nothing

Note
  4 pin mode must be enabled on appropriate channel. Must be called after each Chip_I2S_TxModeConfig call if slave mode is needed.

Definition at line 365 of file i2s_18xx_43xx.h.

STATIC INLINE void Chip_I2S_TxStart | ( | LPC_I2S_T * | pI2S | ) |

Start transmit data.

Parameters

  pI2S | : The base of I2S peripheral on the chip

Returns
  Nothing

Definition at line 265 of file i2s_18xx_43xx.h.

STATIC INLINE void Chip_I2S_TxStop | ( | LPC_I2S_T * | pI2S | ) |

Stop I2S asynchronously.

Parameters

  pI2S | : The base of I2S peripheral on the chip

Returns
  Nothing

Note
  Pause, resets the transmit channel and FIFO asynchronously

Definition at line 327 of file i2s_18xx_43xx.h.