LPCOpen Platform for LPC18XX/43XX microcontrollers  18XX43XX
LPCOpen Platform for the NXP LPC18XX/43XX family of Microcontrollers
Data Fields

Detailed Description

State Configurable Timer register block structure.

Definition at line 54 of file sct_18xx_43xx.h.

#include "sct_18xx_43xx.h"

Data Fields

__IO uint32_t CONFIG
 
union {
   __IO uint32_t   CTRL_U
 
   struct {
      __IO uint16_t   CTRL_L
 
      __IO uint16_t   CTRL_H
 
   } 
 
}; 
 
__IO uint16_t LIMIT_L
 
__IO uint16_t LIMIT_H
 
__IO uint16_t HALT_L
 
__IO uint16_t HALT_H
 
__IO uint16_t STOP_L
 
__IO uint16_t STOP_H
 
__IO uint16_t START_L
 
__IO uint16_t START_H
 
uint32_t RESERVED1 [10]
 
union {
   __IO uint32_t   COUNT_U
 
   struct {
      __IO uint16_t   COUNT_L
 
      __IO uint16_t   COUNT_H
 
   } 
 
}; 
 
__IO uint16_t STATE_L
 
__IO uint16_t STATE_H
 
__I uint32_t INPUT
 
__IO uint16_t REGMODE_L
 
__IO uint16_t REGMODE_H
 
__IO uint32_t OUTPUT
 
__IO uint32_t OUTPUTDIRCTRL
 
__IO uint32_t RES
 
__IO uint32_t DMA0REQUEST
 
__IO uint32_t DMA1REQUEST
 
uint32_t RESERVED2 [35]
 
__IO uint32_t EVEN
 
__IO uint32_t EVFLAG
 
__IO uint32_t CONEN
 
__IO uint32_t CONFLAG
 
union {
   union {
      uint32_t   U
 
      struct {
         uint16_t   L
 
         uint16_t   H
 
      } 
 
   }   MATCH [CONFIG_SCT_nRG]
 
   union {
      uint32_t   U
 
      struct {
         uint16_t   L
 
         uint16_t   H
 
      } 
 
   }   CAP [CONFIG_SCT_nRG]
 
}; 
 
uint32_t RESERVED3 [32-CONFIG_SCT_nRG]
 
union {
   __IO uint16_t   MATCH_L [CONFIG_SCT_nRG]
 
   __I uint16_t   CAP_L [CONFIG_SCT_nRG]
 
}; 
 
uint16_t RESERVED4 [32-CONFIG_SCT_nRG]
 
union {
   __IO uint16_t   MATCH_H [CONFIG_SCT_nRG]
 
   __I uint16_t   CAP_H [CONFIG_SCT_nRG]
 
}; 
 
uint16_t RESERVED5 [32-CONFIG_SCT_nRG]
 
union {
   union {
      uint32_t   U
 
      struct {
         uint16_t   L
 
         uint16_t   H
 
      } 
 
   }   MATCHREL [CONFIG_SCT_nRG]
 
   union {
      uint32_t   U
 
      struct {
         uint16_t   L
 
         uint16_t   H
 
      } 
 
   }   CAPCTRL [CONFIG_SCT_nRG]
 
}; 
 
uint32_t RESERVED6 [32-CONFIG_SCT_nRG]
 
union {
   __IO uint16_t   MATCHREL_L [CONFIG_SCT_nRG]
 
   __IO uint16_t   CAPCTRL_L [CONFIG_SCT_nRG]
 
}; 
 
uint16_t RESERVED7 [32-CONFIG_SCT_nRG]
 
union {
   __IO uint16_t   MATCHREL_H [CONFIG_SCT_nRG]
 
   __IO uint16_t   CAPCTRL_H [CONFIG_SCT_nRG]
 
}; 
 
uint16_t RESERVED8 [32-CONFIG_SCT_nRG]
 
struct {
   uint32_t   STATE
 
   uint32_t   CTRL
 
EVENT [CONFIG_SCT_nEV]
 
uint32_t RESERVED9 [128-2 *CONFIG_SCT_nEV]
 
struct {
   uint32_t   SET
 
   uint32_t   CLR
 
OUT [CONFIG_SCT_nOU]
 
uint32_t RESERVED10 [191-2 *CONFIG_SCT_nOU]
 
__I uint32_t MODULECONTENT
 

Field Documentation

union { ... }
union { ... }
union { ... }
union { ... }
union { ... }
union { ... }
union { ... }
union { ... }
__I { ... } CAP[CONFIG_SCT_nRG]
__I uint16_t CAP_H[CONFIG_SCT_nRG]

0x1C0-... Capture Value H counter

Definition at line 128 of file sct_18xx_43xx.h.

__I uint16_t CAP_L[CONFIG_SCT_nRG]

0x180-... Capture Value L counter

Definition at line 122 of file sct_18xx_43xx.h.

__IO { ... } CAPCTRL[CONFIG_SCT_nRG]
__IO uint16_t CAPCTRL_H[CONFIG_SCT_nRG]

0x2C0-... Capture Control value H counter

Definition at line 162 of file sct_18xx_43xx.h.

__IO uint16_t CAPCTRL_L[CONFIG_SCT_nRG]

0x280-... Capture Control value L counter

Definition at line 156 of file sct_18xx_43xx.h.

uint32_t CLR

Output n Clear Register

Definition at line 174 of file sct_18xx_43xx.h.

__IO uint32_t CONEN

conflict enable register

Definition at line 96 of file sct_18xx_43xx.h.

__IO uint32_t CONFIG

Configuration Register

Definition at line 55 of file sct_18xx_43xx.h.

__IO uint32_t CONFLAG

conflict flag register

Definition at line 97 of file sct_18xx_43xx.h.

__IO uint16_t COUNT_H

counter register for counter H

Definition at line 78 of file sct_18xx_43xx.h.

__IO uint16_t COUNT_L

counter register for counter L

Definition at line 77 of file sct_18xx_43xx.h.

__IO uint32_t COUNT_U

counter register

Definition at line 75 of file sct_18xx_43xx.h.

uint32_t CTRL

Event Control Register

Definition at line 168 of file sct_18xx_43xx.h.

__IO uint16_t CTRL_H

High control register

Definition at line 60 of file sct_18xx_43xx.h.

__IO uint16_t CTRL_L

Low control register

Definition at line 59 of file sct_18xx_43xx.h.

__IO uint32_t CTRL_U

Control Register

Definition at line 57 of file sct_18xx_43xx.h.

__IO uint32_t DMA0REQUEST

DMA0 Request Register

Definition at line 91 of file sct_18xx_43xx.h.

__IO uint32_t DMA1REQUEST

DMA1 Request Register

Definition at line 92 of file sct_18xx_43xx.h.

__IO uint32_t EVEN

event enable register

Definition at line 94 of file sct_18xx_43xx.h.

__IO { ... } EVENT[CONFIG_SCT_nEV]
__IO uint32_t EVFLAG

event flag register

Definition at line 95 of file sct_18xx_43xx.h.

uint16_t H

SCTMATCH[i].H Access to H value

SCTCAP[i].H Access to H value

SCTMATCHREL[i].H Access to H value

SCTCAPCTRL[i].H Access to H value

Definition at line 103 of file sct_18xx_43xx.h.

__IO uint16_t HALT_H

halt register for counter H

Definition at line 68 of file sct_18xx_43xx.h.

__IO uint16_t HALT_L

halt register for counter L

Definition at line 67 of file sct_18xx_43xx.h.

__I uint32_t INPUT

input register

Definition at line 85 of file sct_18xx_43xx.h.

uint16_t L

SCTMATCH[i].L Access to L value

SCTCAP[i].L Access to L value

SCTMATCHREL[i].L Access to L value

SCTCAPCTRL[i].L Access to L value

Definition at line 102 of file sct_18xx_43xx.h.

__IO uint16_t LIMIT_H

limit register for counter H

Definition at line 66 of file sct_18xx_43xx.h.

__IO uint16_t LIMIT_L

limit register for counter L

Definition at line 65 of file sct_18xx_43xx.h.

__IO { ... } MATCH[CONFIG_SCT_nRG]
__IO uint16_t MATCH_H[CONFIG_SCT_nRG]

0x1C0-... Match Value H counter

Definition at line 127 of file sct_18xx_43xx.h.

__IO uint16_t MATCH_L[CONFIG_SCT_nRG]

0x180-... Match Value L counter

Definition at line 121 of file sct_18xx_43xx.h.

__IO { ... } MATCHREL[CONFIG_SCT_nRG]
__IO uint16_t MATCHREL_H[CONFIG_SCT_nRG]

0x2C0-... Match Reload value H counter

Definition at line 161 of file sct_18xx_43xx.h.

__IO uint16_t MATCHREL_L[CONFIG_SCT_nRG]

0x280-... Match Reload value L counter

Definition at line 155 of file sct_18xx_43xx.h.

__I uint32_t MODULECONTENT

0x7FC Module Content

Definition at line 178 of file sct_18xx_43xx.h.

__IO { ... } OUT[CONFIG_SCT_nOU]
__IO uint32_t OUTPUT

output register

Definition at line 88 of file sct_18xx_43xx.h.

__IO uint32_t OUTPUTDIRCTRL

output counter direction Control Register

Definition at line 89 of file sct_18xx_43xx.h.

__IO uint16_t REGMODE_H

match - capture registers mode register H

Definition at line 87 of file sct_18xx_43xx.h.

__IO uint16_t REGMODE_L

match - capture registers mode register L

Definition at line 86 of file sct_18xx_43xx.h.

__IO uint32_t RES

conflict resolution register

Definition at line 90 of file sct_18xx_43xx.h.

uint32_t RESERVED1[10]

0x03C reserved

Definition at line 73 of file sct_18xx_43xx.h.

uint32_t RESERVED10[191-2 *CONFIG_SCT_nOU]

...-0x7F8 reserved

Definition at line 177 of file sct_18xx_43xx.h.

uint32_t RESERVED2[35]

Definition at line 93 of file sct_18xx_43xx.h.

uint32_t RESERVED3[32-CONFIG_SCT_nRG]

...-0x17C reserved

Definition at line 119 of file sct_18xx_43xx.h.

uint16_t RESERVED4[32-CONFIG_SCT_nRG]

...-0x1BE reserved

Definition at line 125 of file sct_18xx_43xx.h.

uint16_t RESERVED5[32-CONFIG_SCT_nRG]

...-0x1FE reserved

Definition at line 131 of file sct_18xx_43xx.h.

uint32_t RESERVED6[32-CONFIG_SCT_nRG]

...-0x27C reserved

Definition at line 153 of file sct_18xx_43xx.h.

uint16_t RESERVED7[32-CONFIG_SCT_nRG]

...-0x2BE reserved

Definition at line 159 of file sct_18xx_43xx.h.

uint16_t RESERVED8[32-CONFIG_SCT_nRG]

...-0x2FE reserved

Definition at line 165 of file sct_18xx_43xx.h.

uint32_t RESERVED9[128-2 *CONFIG_SCT_nEV]

...-0x4FC reserved

Definition at line 171 of file sct_18xx_43xx.h.

uint32_t SET

< 0x500-0x57C SCTOUT[i].SET / SCTOUT[i].CLR Output n Set Register

Definition at line 173 of file sct_18xx_43xx.h.

__IO uint16_t START_H

start register for counter H

Definition at line 72 of file sct_18xx_43xx.h.

__IO uint16_t START_L

start register for counter L

Definition at line 71 of file sct_18xx_43xx.h.

uint32_t STATE

< 0x300-0x3FC SCTEVENT[i].STATE / SCTEVENT[i].CTRL Event State Register

Definition at line 167 of file sct_18xx_43xx.h.

__IO uint16_t STATE_H

state register for counter H

Definition at line 84 of file sct_18xx_43xx.h.

__IO uint16_t STATE_L

state register for counter L

Definition at line 83 of file sct_18xx_43xx.h.

__IO uint16_t STOP_H

stop register for counter H

Definition at line 70 of file sct_18xx_43xx.h.

__IO uint16_t STOP_L

stop register for counter L

Definition at line 69 of file sct_18xx_43xx.h.

uint32_t U

< ... Match / Capture value SCTMATCH[i].U Unified 32-bit register

SCTCAP[i].U Unified 32-bit register

< 0x200-... Match Reload / Capture Control value SCTMATCHREL[i].U Unified 32-bit register

SCTCAPCTRL[i].U Unified 32-bit register

Definition at line 100 of file sct_18xx_43xx.h.


The documentation for this struct was generated from the following file: