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LPCOpen Platform for LPC18XX/43XX microcontrollers
18XX43XX
LPCOpen Platform for the NXP LPC18XX/43XX family of Microcontrollers
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Go to the source code of this file.
Data Structures | |
| struct | LPC_I2S_T |
| I2S register block structure. More... | |
| struct | I2S_AUDIO_FORMAT_T |
| I2S Audio Format Structure. More... | |
Macros | |
| #define | I2S_WORDWIDTH_8 (0UL << 0) |
| #define | I2S_WORDWIDTH_16 (1UL << 0) |
| #define | I2S_WORDWIDTH_32 (3UL << 0) |
| #define | I2S_STEREO (0UL << 2) |
| #define | I2S_MONO (1UL << 2) |
| #define | I2S_MASTER_MODE (0UL << 5) |
| #define | I2S_SLAVE_MODE (1UL << 5) |
| #define | I2S_STOP_ENABLE (0UL << 3) |
| #define | I2S_STOP_DISABLE (1UL << 3) |
| #define | I2S_RESET_ENABLE (1UL << 4) |
| #define | I2S_RESET_DISABLE (0UL << 4) |
| #define | I2S_MUTE_ENABLE (1UL << 15) |
| #define | I2S_MUTE_DISABLE (0UL << 15) |
| #define | I2S_DAO_WORDWIDTH_8 ((uint32_t) (0)) |
| #define | I2S_DAO_WORDWIDTH_16 ((uint32_t) (1)) |
| #define | I2S_DAO_WORDWIDTH_32 ((uint32_t) (3)) |
| #define | I2S_DAO_WORDWIDTH_MASK ((uint32_t) (3)) |
| #define | I2S_DAO_MONO ((uint32_t) (1 << 2)) |
| #define | I2S_DAO_STOP ((uint32_t) (1 << 3)) |
| #define | I2S_DAO_RESET ((uint32_t) (1 << 4)) |
| #define | I2S_DAO_SLAVE ((uint32_t) (1 << 5)) |
| #define | I2S_DAO_WS_HALFPERIOD(n) ((uint32_t) (((n) & 0x1FF) << 6)) |
| #define | I2S_DAO_WS_HALFPERIOD_MASK ((uint32_t) ((0x1FF) << 6)) |
| #define | I2S_DAO_MUTE ((uint32_t) (1 << 15)) |
| #define | I2S_DAI_WORDWIDTH_8 ((uint32_t) (0)) |
| #define | I2S_DAI_WORDWIDTH_16 ((uint32_t) (1)) |
| #define | I2S_DAI_WORDWIDTH_32 ((uint32_t) (3)) |
| #define | I2S_DAI_WORDWIDTH_MASK ((uint32_t) (3)) |
| #define | I2S_DAI_MONO ((uint32_t) (1 << 2)) |
| #define | I2S_DAI_STOP ((uint32_t) (1 << 3)) |
| #define | I2S_DAI_RESET ((uint32_t) (1 << 4)) |
| #define | I2S_DAI_SLAVE ((uint32_t) (1 << 5)) |
| #define | I2S_DAI_WS_HALFPERIOD(n) ((uint32_t) (((n) & 0x1FF) << 6)) |
| #define | I2S_DAI_WS_HALFPERIOD_MASK ((uint32_t) ((0x1FF) << 6)) |
| #define | I2S_STATE_IRQ ((uint32_t) (1)) |
| #define | I2S_STATE_DMA1 ((uint32_t) (1 << 1)) |
| #define | I2S_STATE_DMA2 ((uint32_t) (1 << 2)) |
| #define | I2S_STATE_RX_LEVEL(n) ((uint32_t) ((n & 1F) << 8)) |
| #define | I2S_STATE_TX_LEVEL(n) ((uint32_t) ((n & 1F) << 16)) |
| #define | I2S_DMA1_RX_ENABLE ((uint32_t) (1)) |
| #define | I2S_DMA1_TX_ENABLE ((uint32_t) (1 << 1)) |
| #define | I2S_DMA1_RX_DEPTH(n) ((uint32_t) ((n & 0x1F) << 8)) |
| #define | I2S_DMA1_TX_DEPTH(n) ((uint32_t) ((n & 0x1F) << 16)) |
| #define | I2S_DMA2_RX_ENABLE ((uint32_t) (1)) |
| #define | I2S_DMA2_TX_ENABLE ((uint32_t) (1 << 1)) |
| #define | I2S_DMA2_RX_DEPTH(n) ((uint32_t) ((n & 0x1F) << 8)) |
| #define | I2S_DMA2_TX_DEPTH(n) ((uint32_t) ((n & 0x1F) << 16)) |
| #define | I2S_IRQ_RX_ENABLE ((uint32_t) (1)) |
| #define | I2S_IRQ_TX_ENABLE ((uint32_t) (1 << 1)) |
| #define | I2S_IRQ_RX_DEPTH(n) ((uint32_t) ((n & 0x0F) << 8)) |
| #define | I2S_IRQ_RX_DEPTH_MASK ((uint32_t) ((0x0F) << 8)) |
| #define | I2S_IRQ_TX_DEPTH(n) ((uint32_t) ((n & 0x0F) << 16)) |
| #define | I2S_IRQ_TX_DEPTH_MASK ((uint32_t) ((0x0F) << 16)) |
| #define | I2S_TXRATE_Y_DIVIDER(n) ((uint32_t) (n & 0xFF)) |
| #define | I2S_TXRATE_X_DIVIDER(n) ((uint32_t) ((n & 0xFF) << 8)) |
| #define | I2S_RXRATE_Y_DIVIDER(n) ((uint32_t) (n & 0xFF)) |
| #define | I2S_RXRATE_X_DIVIDER(n) ((uint32_t) ((n & 0xFF) << 8)) |
| #define | I2S_TXBITRATE(n) ((uint32_t) (n & 0x3F)) |
| #define | I2S_RXBITRATE(n) ((uint32_t) (n & 0x3F)) |
| #define | I2S_TXMODE_CLKSEL(n) ((uint32_t) (n & 0x03)) |
| #define | I2S_TXMODE_4PIN_ENABLE ((uint32_t) (1 << 2)) |
| #define | I2S_TXMODE_MCENA ((uint32_t) (1 << 3)) |
| #define | I2S_RXMODE_CLKSEL(n) ((uint32_t) (n & 0x03)) |
| #define | I2S_RXMODE_4PIN_ENABLE ((uint32_t) (1 << 2)) |
| #define | I2S_RXMODE_MCENA ((uint32_t) (1 << 3)) |
Enumerations | |
| enum | I2S_DMA_CHANNEL_T { I2S_DMA_REQUEST_CHANNEL_1, I2S_DMA_REQUEST_CHANNEL_2, I2S_DMA_REQUEST_CHANNEL_NUM } |
| I2S DMA request channel define. More... | |
Functions | |
| void | Chip_I2S_Init (LPC_I2S_T *pI2S) |
| Initialize for I2S. More... | |
| void | Chip_I2S_DeInit (LPC_I2S_T *pI2S) |
| Shutdown I2S. More... | |
| STATIC INLINE void | Chip_I2S_Send (LPC_I2S_T *pI2S, uint32_t data) |
| Send a 32-bit data to TXFIFO for transmition. More... | |
| STATIC INLINE uint32_t | Chip_I2S_Receive (LPC_I2S_T *pI2S) |
| Get received data from RXFIFO. More... | |
| STATIC INLINE void | Chip_I2S_TxStart (LPC_I2S_T *pI2S) |
| Start transmit data. More... | |
| STATIC INLINE void | Chip_I2S_RxStart (LPC_I2S_T *pI2S) |
| Start receive data. More... | |
| STATIC INLINE void | Chip_I2S_TxPause (LPC_I2S_T *pI2S) |
| Disables accesses on FIFOs, places the transmit channel in mute mode. More... | |
| STATIC INLINE void | Chip_I2S_RxPause (LPC_I2S_T *pI2S) |
| Disables accesses on FIFOs, places the transmit channel in mute mode. More... | |
| STATIC INLINE void | Chip_I2S_EnableMute (LPC_I2S_T *pI2S) |
| Mute the Transmit channel. More... | |
| STATIC INLINE void | Chip_I2S_DisableMute (LPC_I2S_T *pI2S) |
| Un-Mute the I2S channel. More... | |
| STATIC INLINE void | Chip_I2S_TxStop (LPC_I2S_T *pI2S) |
| Stop I2S asynchronously. More... | |
| STATIC INLINE void | Chip_I2S_RxStop (LPC_I2S_T *pI2S) |
| Stop I2S asynchronously. More... | |
| STATIC INLINE void | Chip_I2S_RxSlave (LPC_I2S_T *pI2S) |
| Sets the I2S receive channel in slave mode. More... | |
| STATIC INLINE void | Chip_I2S_TxSlave (LPC_I2S_T *pI2S) |
| Sets the I2S transmit channel in slave mode. More... | |
| STATIC INLINE void | Chip_I2S_TxModeConfig (LPC_I2S_T *pI2S, uint32_t clksel, uint32_t fpin, uint32_t mcena) |
| Set the I2S transmit mode. More... | |
| STATIC INLINE void | Chip_I2S_RxModeConfig (LPC_I2S_T *pI2S, uint32_t clksel, uint32_t fpin, uint32_t mcena) |
| Set the I2S receive mode. More... | |
| STATIC INLINE uint8_t | Chip_I2S_GetTxLevel (LPC_I2S_T *pI2S) |
| Get the current level of the Transmit FIFO. More... | |
| STATIC INLINE uint8_t | Chip_I2S_GetRxLevel (LPC_I2S_T *pI2S) |
| Get the current level of the Receive FIFO. More... | |
| STATIC INLINE void | Chip_I2S_SetTxBitRate (LPC_I2S_T *pI2S, uint32_t div) |
| Set the clock frequency for I2S interface. More... | |
| STATIC INLINE void | Chip_I2S_SetRxBitRate (LPC_I2S_T *pI2S, uint32_t div) |
| Set the clock frequency for I2S interface. More... | |
| STATIC INLINE void | Chip_I2S_SetTxXYDivider (LPC_I2S_T *pI2S, uint8_t xDiv, uint8_t yDiv) |
| Set the MCLK rate by using a fractional rate generator, dividing down the frequency of PCLK. More... | |
| STATIC INLINE void | Chip_I2S_SetRxXYDivider (LPC_I2S_T *pI2S, uint8_t xDiv, uint8_t yDiv) |
| Set the MCLK rate by using a fractional rate generator, dividing down the frequency of PCLK. More... | |
| Status | Chip_I2S_TxConfig (LPC_I2S_T *pI2S, I2S_AUDIO_FORMAT_T *format) |
| Configure I2S for Audio Format input. More... | |
| Status | Chip_I2S_RxConfig (LPC_I2S_T *pI2S, I2S_AUDIO_FORMAT_T *format) |
| Configure I2S for Audio Format input. More... | |
| void | Chip_I2S_Int_TxCmd (LPC_I2S_T *pI2S, FunctionalState newState, uint8_t depth) |
| Enable/Disable Interrupt with a specific FIFO depth. More... | |
| void | Chip_I2S_Int_RxCmd (LPC_I2S_T *pI2S, FunctionalState newState, uint8_t depth) |
| Enable/Disable Interrupt with a specific FIFO depth. More... | |
| void | Chip_I2S_DMA_TxCmd (LPC_I2S_T *pI2S, I2S_DMA_CHANNEL_T dmaNum, FunctionalState newState, uint8_t depth) |
| Enable/Disable DMA with a specific FIFO depth. More... | |
| void | Chip_I2S_DMA_RxCmd (LPC_I2S_T *pI2S, I2S_DMA_CHANNEL_T dmaNum, FunctionalState newState, uint8_t depth) |
| Enable/Disable DMA with a specific FIFO depth. More... | |
1.8.3.1