LPCOpen Platform for LPC18XX/43XX microcontrollers: C:/w/lpcopen_docs/software/lpc_core/lpc_board/board_common/mem_tests.c Source File

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mem_tests.c
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1 /*
2 * @brief Generic memory tests
3 * Various memory tests for testing external memory integrity. Includes
4 * inverse address, walking bit, and pattern tests.
5 *
6 * @note
7 * Copyright(C) NXP Semiconductors, 2012
8 * All rights reserved.
9 *
10 * @par
11 * Software that is described herein is for illustrative purposes only
12 * which provides customers with programming information regarding the
13 * LPC products. This software is supplied "AS IS" without any warranties of
14 * any kind, and NXP Semiconductors and its licensor disclaim any and
15 * all warranties, express or implied, including all implied warranties of
16 * merchantability, fitness for a particular purpose and non-infringement of
17 * intellectual property rights. NXP Semiconductors assumes no responsibility
18 * or liability for the use of the software, conveys no license or rights under any
19 * patent, copyright, mask work right, or any other intellectual property rights in
20 * or to any products. NXP Semiconductors reserves the right to make changes
21 * in the software without notification. NXP Semiconductors also makes no
22 * representation or warranty that such application will be suitable for the
23 * specified use without further testing or modification.
24 *
25 * @par
26 * Permission to use, copy, modify, and distribute this software and its
27 * documentation is hereby granted, under NXP Semiconductors' and its
28 * licensor's relevant copyrights in the software, without fee, provided that it
29 * is used in conjunction with NXP Semiconductors microcontrollers. This
30 * copyright, permission, and disclaimer notice must appear in all copies of
31 * this code.
32 */
33
34 #include "mem_tests.h"
35
36 /*****************************************************************************
37 * Private types/enumerations/variables
38 ****************************************************************************/
39
40 /*****************************************************************************
41 * Public types/enumerations/variables
42 ****************************************************************************/
43
44 /*****************************************************************************
45 * Private functions
46 ****************************************************************************/
47
48 /*****************************************************************************
49 * Public functions
50 ****************************************************************************/
51
52 /* Walking 0 memory test */
53 bool mem_test_walking0(MEM_TEST_SETUP_T *pMemSetup)
54 {
55 int i = 0;
56 uint32_t fbytes = pMemSetup->bytes, *addr = pMemSetup->start_addr;
57
58 /* Must be 32-bit algined */
59 if ((((uint32_t) addr & 0x3) != 0) || ((fbytes & 0x3) != 0)) {
60 return false;
61 }
62
63 /* Write walking 0 pattern */
64 while (fbytes > 0) {
65 *addr = ~(1 << i);
66
67 addr++;
68 fbytes -= 4;
69 i++;
70 if (i >= 32) {
71 i = 0;
72 }
73 }
74
75 /* Verify walking 0 pattern */
76 i = 0;
77 fbytes = pMemSetup->bytes;
78 addr = pMemSetup->start_addr;
79 while (fbytes > 0) {
80 if (*addr != ~(1 << i)) {
81 pMemSetup->fail_addr = addr;
82 pMemSetup->is_val = *addr;
83 pMemSetup->ex_val = ~(1 << i);
84 return false;
85 }
86
87 addr++;
88 fbytes -= 4;
89 i++;
90 if (i >= 32) {
91 i = 0;
92 }
93 }
94
95 return true;
96 }
97
98 /* Walking 1 memory test */
99 bool mem_test_walking1(MEM_TEST_SETUP_T *pMemSetup)
100 {
101 int i = 0;
102 uint32_t fbytes = pMemSetup->bytes, *addr = pMemSetup->start_addr;
103
104 /* Must be 32-bit algined */
105 if ((((uint32_t) addr & 0x3) != 0) || ((fbytes & 0x3) != 0)) {
106 return false;
107 }
108
109 /* Write walking 1 pattern */
110 while (fbytes > 0) {
111 *addr = (1 << i);
112
113 addr++;
114 fbytes -= 4;
115 i++;
116 if (i >= 32) {
117 i = 0;
118 }
119 }
120
121 /* Verify walking 1 pattern */
122 i = 0;
123 fbytes = pMemSetup->bytes;
124 addr = pMemSetup->start_addr;
125 while (fbytes > 0) {
126 if (*addr != (1 << i)) {
127 pMemSetup->fail_addr = addr;
128 pMemSetup->is_val = *addr;
129 pMemSetup->ex_val = (1 << i);
130 return false;
131 }
132
133 addr++;
134 fbytes -= 4;
135 i++;
136 if (i >= 32) {
137 i = 0;
138 }
139 }
140
141 return true;
142 }
143
144 /* Address memory test */
145 bool mem_test_address(MEM_TEST_SETUP_T *pMemSetup)
146 {
147 uint32_t fbytes = pMemSetup->bytes, *addr = pMemSetup->start_addr;
148
149 /* Must be 32-bit algined */
150 if ((((uint32_t) addr & 0x3) != 0) || ((fbytes & 0x3) != 0)) {
151 return false;
152 }
153
154 /* Write address for memory location */
155 while (fbytes > 0) {
156 *addr = (uint32_t) addr;
157
158 addr++;
159 fbytes -= 4;
160 }
161
162 /* Verify address for memory location */
163 fbytes = pMemSetup->bytes;
164 addr = pMemSetup->start_addr;
165 while (fbytes > 0) {
166 if (*addr != (uint32_t) addr) {
167 pMemSetup->fail_addr = addr;
168 pMemSetup->is_val = *addr;
169 pMemSetup->ex_val = (uint32_t) addr;
170 return false;
171 }
172
173 addr++;
174 fbytes -= 4;
175 }
176
177 return true;
178 }
179
180 /* Inverse address memory test */
181 bool mem_test_invaddress(MEM_TEST_SETUP_T *pMemSetup)
182 {
183 uint32_t fbytes = pMemSetup->bytes, *addr = pMemSetup->start_addr;
184
185 /* Must be 32-bit algined */
186 if ((((uint32_t) addr & 0x3) != 0) || ((fbytes & 0x3) != 0)) {
187 return false;
188 }
189
190 /* Write inverse address for memory location */
191 while (fbytes > 0) {
192 *addr = ~(uint32_t) addr;
193
194 addr++;
195 fbytes -= 4;
196 }
197
198 /* Verify inverse address for memory location */
199 fbytes = pMemSetup->bytes;
200 addr = pMemSetup->start_addr;
201 while (fbytes > 0) {
202 if (*addr != ~(uint32_t) addr) {
203 pMemSetup->fail_addr = addr;
204 pMemSetup->is_val = *addr;
205 pMemSetup->ex_val = ~(uint32_t) addr;
206 return false;
207 }
208
209 addr++;
210 fbytes -= 4;
211 }
212
213 return true;
214 }
215
216 /* Pattern memory test */
217 bool mem_test_pattern(MEM_TEST_SETUP_T *pMemSetup)
218 {
219 uint32_t fbytes = pMemSetup->bytes, *addr = pMemSetup->start_addr;
220 uint32_t pattern = 0x55AA55AA;
221
222 /* Must be 32-bit algined */
223 if ((((uint32_t) addr & 0x3) != 0) || ((fbytes & 0x3) != 0)) {
224 return false;
225 }
226
227 /* Write pattern for memory location */
228 while (fbytes > 0) {
229 *addr = pattern;
230
231 pattern = ~pattern;
232 addr++;
233 fbytes -= 4;
234 }
235
236 /* Verify pattern for memory location */
237 pattern = 0x55AA55AA;
238 fbytes = pMemSetup->bytes;
239 addr = pMemSetup->start_addr;
240 while (fbytes > 0) {
241 if (*addr != pattern) {
242 pMemSetup->fail_addr = addr;
243 pMemSetup->is_val = *addr;
244 pMemSetup->ex_val = pattern;
245 return false;
246 }
247
248 pattern = ~pattern;
249 addr++;
250 fbytes -= 4;
251 }
252
253 return true;
254 }
255
256 /* Pattern memory test with seed and increment value */
257 bool mem_test_pattern_seed(MEM_TEST_SETUP_T *pMemSetup, uint32_t seed, uint32_t incr)
258 {
259 uint32_t fbytes = pMemSetup->bytes, *addr = pMemSetup->start_addr;
260 uint32_t pattern = seed;
261
262 /* Must be 32-bit algined */
263 if ((((uint32_t) addr & 0x3) != 0) || ((fbytes & 0x3) != 0)) {
264 return false;
265 }
266
267 /* Write pattern for memory location */
268 while (fbytes > 0) {
269 *addr = pattern;
270
271 pattern += incr;
272 addr++;
273 fbytes -= 4;
274 }
275
276 /* Verify pattern for memory location */
277 pattern = seed;
278 fbytes = pMemSetup->bytes;
279 addr = pMemSetup->start_addr;
280 while (fbytes > 0) {
281 if (*addr != pattern) {
282 pMemSetup->fail_addr = addr;
283 pMemSetup->is_val = *addr;
284 pMemSetup->ex_val = pattern;
285 return false;
286 }
287
288 pattern += incr;
289 addr++;
290 fbytes -= 4;
291 }
292
293 return true;
294 }