LPCOpen Platform for LPC18XX/43XX microcontrollers  18XX43XX
LPCOpen Platform for the NXP LPC18XX/43XX family of Microcontrollers
lcd_18xx_43xx.h
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1 /*
2  * @brief LPC18xx/43xx LCD chip driver
3  *
4  * @note
5  * Copyright(C) NXP Semiconductors, 2012
6  * All rights reserved.
7  *
8  * @par
9  * Software that is described herein is for illustrative purposes only
10  * which provides customers with programming information regarding the
11  * LPC products. This software is supplied "AS IS" without any warranties of
12  * any kind, and NXP Semiconductors and its licensor disclaim any and
13  * all warranties, express or implied, including all implied warranties of
14  * merchantability, fitness for a particular purpose and non-infringement of
15  * intellectual property rights. NXP Semiconductors assumes no responsibility
16  * or liability for the use of the software, conveys no license or rights under any
17  * patent, copyright, mask work right, or any other intellectual property rights in
18  * or to any products. NXP Semiconductors reserves the right to make changes
19  * in the software without notification. NXP Semiconductors also makes no
20  * representation or warranty that such application will be suitable for the
21  * specified use without further testing or modification.
22  *
23  * @par
24  * Permission to use, copy, modify, and distribute this software and its
25  * documentation is hereby granted, under NXP Semiconductors' and its
26  * licensor's relevant copyrights in the software, without fee, provided that it
27  * is used in conjunction with NXP Semiconductors microcontrollers. This
28  * copyright, permission, and disclaimer notice must appear in all copies of
29  * this code.
30  */
31 
32 #ifndef __LCD_18XX_43XX_H_
33 #define __LCD_18XX_43XX_H_
34 
35 #ifdef __cplusplus
36 extern "C" {
37 #endif
38 
47 typedef struct {
48  __IO uint32_t TIMH;
49  __IO uint32_t TIMV;
50  __IO uint32_t POL;
51  __IO uint32_t LE;
52  __IO uint32_t UPBASE;
53  __IO uint32_t LPBASE;
54  __IO uint32_t CTRL;
55  __IO uint32_t INTMSK;
56  __I uint32_t INTRAW;
57  __I uint32_t INTSTAT;
58  __O uint32_t INTCLR;
59  __I uint32_t UPCURR;
60  __I uint32_t LPCURR;
61  __I uint32_t RESERVED0[115];
62  __IO uint16_t PAL[256];
63  __I uint32_t RESERVED1[256];
64  __IO uint32_t CRSR_IMG[256];
65  __IO uint32_t CRSR_CTRL;
66  __IO uint32_t CRSR_CFG;
67  __IO uint32_t CRSR_PAL0;
68  __IO uint32_t CRSR_PAL1;
69  __IO uint32_t CRSR_XY;
70  __IO uint32_t CRSR_CLIP;
71  __I uint32_t RESERVED2[2];
72  __IO uint32_t CRSR_INTMSK;
73  __O uint32_t CRSR_INTCLR;
74  __I uint32_t CRSR_INTRAW;
75  __I uint32_t CRSR_INTSTAT;
76 } LPC_LCD_T;
77 
81 typedef struct {
82  uint32_t Rl : 5;
83  uint32_t Gl : 5;
84  uint32_t Bl : 5;
85  uint32_t Il : 1;
86  uint32_t Ru : 5;
87  uint32_t Gu : 5;
88  uint32_t Bu : 5;
89  uint32_t Iu : 1;
91 
95 typedef enum {
96  LCD_TFT = 0x02,
97  LCD_MONO_4 = 0x01,
98  LCD_MONO_8 = 0x05,
99  LCD_CSTN = 0x00
101 
105 typedef enum {
109 
111 #define LCD_INTMSK_FUFIM 0x2
112 #define LCD_INTMSK_LNBUIM 0x4
113 #define LCD_INTMSK_VCOMPIM 0x8
114 #define LCD_INTMSK_BERIM 0x10
116 #define CLCDC_LCDCTRL_ENABLE _BIT(0)
117 #define CLCDC_LCDCTRL_PWR _BIT(11)
122 typedef struct {
123  uint8_t HBP;
124  uint8_t HFP;
125  uint8_t HSW;
126  uint16_t PPL;
127  uint8_t VBP;
128  uint8_t VFP;
129  uint8_t VSW;
130  uint16_t LPP;
131  uint8_t IOE;
132  uint8_t IPC;
133  uint8_t IHS;
134  uint8_t IVS;
135  uint8_t ACB;
136  uint8_t BPP;
139  uint8_t Dual;
140 } LCD_CONFIG_T;
141 
145 typedef enum {
149 
156 void Chip_LCD_Init(LPC_LCD_T *pLCD, LCD_CONFIG_T *LCD_ConfigStruct);
157 
163 void Chip_LCD_DeInit(LPC_LCD_T *pLCD);
164 
171 {
172  volatile int i;
173  pLCD->CTRL |= CLCDC_LCDCTRL_PWR;
174  for (i = 0; i < 1000000; i++) {}
175  pLCD->CTRL |= CLCDC_LCDCTRL_ENABLE;
176 }
177 
184 {
185  volatile int i;
186  pLCD->CTRL &= ~CLCDC_LCDCTRL_PWR;
187  for (i = 0; i < 1000000; i++) {}
188  pLCD->CTRL &= ~CLCDC_LCDCTRL_ENABLE;
189 }
190 
197 {
198  pLCD->CTRL |= CLCDC_LCDCTRL_ENABLE;
199 }
200 
207 {
208  pLCD->CTRL &= ~CLCDC_LCDCTRL_ENABLE;
209 }
210 
219 {
220  pLCD->UPBASE = (uint32_t) buffer;
221 }
222 
230 {
231  pLCD->LPBASE = (uint32_t) buffer;
232 }
233 
245 void Chip_LCD_Cursor_Config(LPC_LCD_T *pLCD, LCD_CURSOR_SIZE_OPT_T cursor_size, bool sync);
246 
254 STATIC INLINE void Chip_LCD_Cursor_Enable(LPC_LCD_T *pLCD, uint8_t cursor_num)
255 {
256  pLCD->CRSR_CTRL = (cursor_num << 4) | 1;
257 }
258 
266 STATIC INLINE void Chip_LCD_Cursor_Disable(LPC_LCD_T *pLCD, uint8_t cursor_num)
267 {
268  pLCD->CRSR_CTRL = (cursor_num << 4);
269 }
270 
277 STATIC INLINE void Chip_LCD_Cursor_LoadPalette0(LPC_LCD_T *pLCD, uint32_t palette_color)
278 {
279  /* 7:0 - Red
280  15:8 - Green
281  23:16 - Blue
282  31:24 - Not used*/
283  pLCD->CRSR_PAL0 = (uint32_t) palette_color;
284 }
285 
292 STATIC INLINE void Chip_LCD_Cursor_LoadPalette1(LPC_LCD_T *pLCD, uint32_t palette_color)
293 {
294  /* 7:0 - Red
295  15:8 - Green
296  23:16 - Blue
297  31:24 - Not used*/
298  pLCD->CRSR_PAL1 = (uint32_t) palette_color;
299 }
300 
308 STATIC INLINE void Chip_LCD_Cursor_SetPos(LPC_LCD_T *pLCD, uint16_t x, uint16_t y)
309 {
310  pLCD->CRSR_XY = (x & 0x3FF) | ((y & 0x3FF) << 16);
311 }
312 
320 STATIC INLINE void Chip_LCD_Cursor_SetClip(LPC_LCD_T *pLCD, uint16_t x, uint16_t y)
321 {
322  pLCD->CRSR_CLIP = (x & 0x3F) | ((y & 0x3F) << 8);
323 }
324 
331 STATIC INLINE void Chip_LCD_EnableInts(LPC_LCD_T *pLCD, uint32_t ints)
332 {
333  pLCD->INTMSK = ints;
334 }
335 
342 STATIC INLINE void Chip_LCD_DisableInts(LPC_LCD_T *pLCD, uint32_t ints)
343 {
344  pLCD->INTMSK = pLCD->INTMSK & ~(ints);
345 }
346 
353 STATIC INLINE void Chip_LCD_ClearInts(LPC_LCD_T *pLCD, uint32_t ints)
354 {
355  pLCD->INTCLR = pLCD->INTMSK & (ints);
356 }
357 
365 void Chip_LCD_Cursor_WriteImage(LPC_LCD_T *pLCD, uint8_t cursor_num, void *Image);
366 
373 void Chip_LCD_LoadPalette(LPC_LCD_T *pLCD, void *palette);
374 
375 #ifdef __cplusplus
376 }
377 #endif
378 
383 #endif /* __LCD_18XX_43XX_H_ */