LPCOpen Platform for LPC18XX/43XX microcontrollers  18XX43XX
LPCOpen Platform for the NXP LPC18XX/43XX family of Microcontrollers
Data Fields

Detailed Description

Power Management Controller register block structure.

Definition at line 47 of file pmc_18xx_43xx.h.

#include "pmc_18xx_43xx.h"

Data Fields

__IO uint32_t PD0_SLEEP0_HW_ENA
 
__I uint32_t RESERVED0 [6]
 
__IO uint32_t PD0_SLEEP0_MODE
 

Field Documentation

__IO uint32_t PD0_SLEEP0_HW_ENA

< PMC Structure Hardware sleep event enable register

Definition at line 48 of file pmc_18xx_43xx.h.

__IO uint32_t PD0_SLEEP0_MODE

Sleep power mode register

Definition at line 50 of file pmc_18xx_43xx.h.

__I uint32_t RESERVED0[6]

Definition at line 49 of file pmc_18xx_43xx.h.


The documentation for this struct was generated from the following file: