32 #ifndef __RGU_18XX_43XX_H_
33 #define __RGU_18XX_43XX_H_
47 typedef enum CHIP_RGU_RST {
104 __I uint32_t RESERVED0[64];
105 __O uint32_t RESET_CTRL[2];
106 __I uint32_t RESERVED1[2];
107 __IO uint32_t RESET_STATUS[4];
108 __I uint32_t RESERVED2[12];
109 __I uint32_t RESET_ACTIVE_STATUS[2];
110 __I uint32_t RESERVED3[170];
121 LPC_RGU->RESET_CTRL[ResetNumber >> 5] = 1 << (ResetNumber & 31);
132 return !(
LPC_RGU->RESET_ACTIVE_STATUS[ResetNumber >> 5] & (1 << (ResetNumber & 31)));
147 LPC_RGU->RESET_CTRL[ResetNumber >> 5] = 0;