LPCOpen Platform for LPC18XX/43XX microcontrollers  18XX43XX
LPCOpen Platform for the NXP LPC18XX/43XX family of Microcontrollers
Enumerations
CHIP: LPC43xx (M0 Core) peripheral interrupt numbers

Detailed Description

Enumerations

enum  LPC43XX_M0_IRQn_Type {
  Reset_IRQn = -15, NonMaskableInt_IRQn = -14, HardFault_IRQn = -13, SVCall_IRQn = -5,
  DebugMonitor_IRQn = -4, PendSV_IRQn = -2, SysTick_IRQn = -1, RTC_IRQn = 0,
  M4_IRQn = 1, DMA_IRQn = 2, RESERVED1_IRQn = 3, FLASHEEPROM_IRQn = 4,
  ATIMER_IRQn = 4, ETHERNET_IRQn = 5, SDIO_IRQn = 6, LCD_IRQn = 7,
  USB0_IRQn = 8, USB1_IRQn = 9, SCT_IRQn = 10, RITIMER_IRQn = 11,
  WWDT_IRQn = 11, TIMER0_IRQn = 12, GINT1_IRQn = 13, PIN_INT4_IRQn = 14,
  TIMER3_IRQn = 15, MCPWM_IRQn = 16, ADC0_IRQn = 17, I2C0_IRQn = 18,
  I2C1_IRQn = 18, SGPIO_INT_IRQn = 19, SPI_INT_IRQn = 20, DAC_IRQn = 20,
  ADC1_IRQn = 21, SSP0_IRQn = 22, SSP1_IRQn = 22, EVENTROUTER_IRQn = 23,
  USART0_IRQn = 24, UART1_IRQn = 25, USART2_IRQn = 26, C_CAN1_IRQn = 26,
  USART3_IRQn = 27, I2S0_IRQn = 28, I2S1_IRQn = 28, QEI_IRQn = 28,
  C_CAN0_IRQn = 29, ADCHS_IRQn = 30, M0SUB_IRQn = 31, Reset_IRQn = -15,
  NonMaskableInt_IRQn = -14, HardFault_IRQn = -13, SVCall_IRQn = -5, DebugMonitor_IRQn = -4,
  PendSV_IRQn = -2, SysTick_IRQn = -1, DAC_IRQn = 0, M4_IRQn = 1,
  DMA_IRQn = 2, RESERVED1_IRQn = 3, SGPIO_INPUT_IRQn = 4, SGPIO_MATCH_IRQn = 5,
  SGPIO_SHIFT_IRQn = 6, SGPIO_POS_IRQn = 7, USB0_IRQn = 8, USB1_IRQn = 9,
  SCT_IRQn = 10, RITIMER_IRQn = 11, GINT1_IRQn = 12, TIMER1_IRQn = 13,
  TIMER2_IRQn = 14, PIN_INT5_IRQn = 15, MCPWM_IRQn = 16, ADC0_IRQn = 17,
  I2C0_IRQn = 18, I2C1_IRQn = 19, SPI_INT_IRQn = 20, ADC1_IRQn = 21,
  SSP0_IRQn = 22, SSP1_IRQn = 22, EVENTROUTER_IRQn = 23, USART0_IRQn = 24,
  UART1_IRQn = 25, USART2_IRQn = 26, C_CAN1_IRQn = 26, USART3_IRQn = 27,
  I2S0_IRQn = 28, I2S1_IRQn = 28, C_CAN0_IRQn = 29, ADCHS_IRQn = 30,
  M0APP_IRQn = 31
}
 
enum  LPC43XX_M0_IRQn_Type {
  Reset_IRQn = -15, NonMaskableInt_IRQn = -14, HardFault_IRQn = -13, SVCall_IRQn = -5,
  DebugMonitor_IRQn = -4, PendSV_IRQn = -2, SysTick_IRQn = -1, RTC_IRQn = 0,
  M4_IRQn = 1, DMA_IRQn = 2, RESERVED1_IRQn = 3, FLASHEEPROM_IRQn = 4,
  ATIMER_IRQn = 4, ETHERNET_IRQn = 5, SDIO_IRQn = 6, LCD_IRQn = 7,
  USB0_IRQn = 8, USB1_IRQn = 9, SCT_IRQn = 10, RITIMER_IRQn = 11,
  WWDT_IRQn = 11, TIMER0_IRQn = 12, GINT1_IRQn = 13, PIN_INT4_IRQn = 14,
  TIMER3_IRQn = 15, MCPWM_IRQn = 16, ADC0_IRQn = 17, I2C0_IRQn = 18,
  I2C1_IRQn = 18, SGPIO_INT_IRQn = 19, SPI_INT_IRQn = 20, DAC_IRQn = 20,
  ADC1_IRQn = 21, SSP0_IRQn = 22, SSP1_IRQn = 22, EVENTROUTER_IRQn = 23,
  USART0_IRQn = 24, UART1_IRQn = 25, USART2_IRQn = 26, C_CAN1_IRQn = 26,
  USART3_IRQn = 27, I2S0_IRQn = 28, I2S1_IRQn = 28, QEI_IRQn = 28,
  C_CAN0_IRQn = 29, ADCHS_IRQn = 30, M0SUB_IRQn = 31, Reset_IRQn = -15,
  NonMaskableInt_IRQn = -14, HardFault_IRQn = -13, SVCall_IRQn = -5, DebugMonitor_IRQn = -4,
  PendSV_IRQn = -2, SysTick_IRQn = -1, DAC_IRQn = 0, M4_IRQn = 1,
  DMA_IRQn = 2, RESERVED1_IRQn = 3, SGPIO_INPUT_IRQn = 4, SGPIO_MATCH_IRQn = 5,
  SGPIO_SHIFT_IRQn = 6, SGPIO_POS_IRQn = 7, USB0_IRQn = 8, USB1_IRQn = 9,
  SCT_IRQn = 10, RITIMER_IRQn = 11, GINT1_IRQn = 12, TIMER1_IRQn = 13,
  TIMER2_IRQn = 14, PIN_INT5_IRQn = 15, MCPWM_IRQn = 16, ADC0_IRQn = 17,
  I2C0_IRQn = 18, I2C1_IRQn = 19, SPI_INT_IRQn = 20, ADC1_IRQn = 21,
  SSP0_IRQn = 22, SSP1_IRQn = 22, EVENTROUTER_IRQn = 23, USART0_IRQn = 24,
  UART1_IRQn = 25, USART2_IRQn = 26, C_CAN1_IRQn = 26, USART3_IRQn = 27,
  I2S0_IRQn = 28, I2S1_IRQn = 28, C_CAN0_IRQn = 29, ADCHS_IRQn = 30,
  M0APP_IRQn = 31
}
 

Enumeration Type Documentation

Enumerator
Reset_IRQn 

1 Reset Vector, invoked on Power up and warm reset

NonMaskableInt_IRQn 

2 Non maskable Interrupt, cannot be stopped or preempted

HardFault_IRQn 

3 Hard Fault, all classes of Fault

SVCall_IRQn 

11 System Service Call via SVC instruction

DebugMonitor_IRQn 

12 Debug Monitor

PendSV_IRQn 

14 Pendable request for system service

SysTick_IRQn 

15 System Tick Timer

RTC_IRQn 

0 RTC

M4_IRQn 

1 M4 Core interrupt

DMA_IRQn 

2 DMA

RESERVED1_IRQn 

3

FLASHEEPROM_IRQn 

4 ORed Flash Bank A, B, EEPROM

ATIMER_IRQn 

4 ATIMER ORed with Flash/EEPROM

ETHERNET_IRQn 

5 ETHERNET

SDIO_IRQn 

6 SDIO

LCD_IRQn 

7 LCD

USB0_IRQn 

8 USB0

USB1_IRQn 

9 USB1

SCT_IRQn 

10 SCT

RITIMER_IRQn 

11 ORed RITIMER, WWDT

WWDT_IRQn 

11 ORed RITIMER, WWDT

TIMER0_IRQn 

12 TIMER0

GINT1_IRQn 

13 GINT1

PIN_INT4_IRQn 

14 GPIO 4

TIMER3_IRQn 

15 TIMER3

MCPWM_IRQn 

16 MCPWM

ADC0_IRQn 

17 ADC0

I2C0_IRQn 

18 ORed I2C0, I2C1

I2C1_IRQn 

18 ORed I2C0, I2C1

SGPIO_INT_IRQn 

19 SGPIO

SPI_INT_IRQn 

20 ORed SPI/DAC

DAC_IRQn 

20 ORed SPI/DAC

ADC1_IRQn 

21 ADC1

SSP0_IRQn 

22 ORed SSP0, SSP1

SSP1_IRQn 

22 ORed SSP0, SSP1

EVENTROUTER_IRQn 

23 EVENTROUTER

USART0_IRQn 

24 USART0

UART1_IRQn 

25 UART1

USART2_IRQn 

26 ORed USART2/C_CAN1

C_CAN1_IRQn 

29 ORed USART2/C_CAN1

USART3_IRQn 

27 USART3

I2S0_IRQn 

28 ORed I2S0/I2S1/QEI

I2S1_IRQn 

29 ORed I2S0/I2S1/QEI

QEI_IRQn 

29 ORed I2S0/I2S1/QEI

C_CAN0_IRQn 

29 C_CAN0

ADCHS_IRQn 

30 ADCHS interrupt

M0SUB_IRQn 

31 M0SUB

Reset_IRQn 

1 Reset Vector, invoked on Power up and warm reset

NonMaskableInt_IRQn 

2 Non maskable Interrupt, cannot be stopped or preempted

HardFault_IRQn 

3 Hard Fault, all classes of Fault

SVCall_IRQn 

11 System Service Call via SVC instruction

DebugMonitor_IRQn 

12 Debug Monitor

PendSV_IRQn 

14 Pendable request for system service

SysTick_IRQn 

15 System Tick Timer

DAC_IRQn 

0 DAC

M4_IRQn 

1 M0a

DMA_IRQn 

2 DMA

RESERVED1_IRQn 

3

SGPIO_INPUT_IRQn 

4 SGPIO Input bit match

SGPIO_MATCH_IRQn 

5 SGPIO Pattern Match

SGPIO_SHIFT_IRQn 

6 SGPIO Shift Clock

SGPIO_POS_IRQn 

7 SGPIO Capture Clock

USB0_IRQn 

8 USB0

USB1_IRQn 

9 USB1

SCT_IRQn 

10 SCT

RITIMER_IRQn 

11 RITIMER

GINT1_IRQn 

12 GINT1

TIMER1_IRQn 

13 TIMER1

TIMER2_IRQn 

14 TIMER2

PIN_INT5_IRQn 

15 GPIO Pin interrupt 5

MCPWM_IRQn 

16 MCPWM

ADC0_IRQn 

17 ADC0

I2C0_IRQn 

18 I2C0

I2C1_IRQn 

19 I2C1

SPI_INT_IRQn 

20 SPI_INT

ADC1_IRQn 

21 ADC1

SSP0_IRQn 

22 ORed SSP0, SSP1

SSP1_IRQn 

22 ORed SSP0, SSP1

EVENTROUTER_IRQn 

23 EVENTROUTER

USART0_IRQn 

24 USART0

UART1_IRQn 

25 UART1

USART2_IRQn 

26 ORed USART2/C_CAN1

C_CAN1_IRQn 

26 ORed USART2/C_CAN1

USART3_IRQn 

27 USART3

I2S0_IRQn 

28 ORed I2S0, I2S1

I2S1_IRQn 

28 ORed I2S0, I2S1

C_CAN0_IRQn 

29 C_CAN0

ADCHS_IRQn 

30 ADCHS interrupt

M0APP_IRQn 

31 M0SUB

Definition at line 80 of file cmsis_43xx_m0app.h.

Enumerator
Reset_IRQn 

1 Reset Vector, invoked on Power up and warm reset

NonMaskableInt_IRQn 

2 Non maskable Interrupt, cannot be stopped or preempted

HardFault_IRQn 

3 Hard Fault, all classes of Fault

SVCall_IRQn 

11 System Service Call via SVC instruction

DebugMonitor_IRQn 

12 Debug Monitor

PendSV_IRQn 

14 Pendable request for system service

SysTick_IRQn 

15 System Tick Timer

RTC_IRQn 

0 RTC

M4_IRQn 

1 M4 Core interrupt

DMA_IRQn 

2 DMA

RESERVED1_IRQn 

3

FLASHEEPROM_IRQn 

4 ORed Flash Bank A, B, EEPROM

ATIMER_IRQn 

4 ATIMER ORed with Flash/EEPROM

ETHERNET_IRQn 

5 ETHERNET

SDIO_IRQn 

6 SDIO

LCD_IRQn 

7 LCD

USB0_IRQn 

8 USB0

USB1_IRQn 

9 USB1

SCT_IRQn 

10 SCT

RITIMER_IRQn 

11 ORed RITIMER, WWDT

WWDT_IRQn 

11 ORed RITIMER, WWDT

TIMER0_IRQn 

12 TIMER0

GINT1_IRQn 

13 GINT1

PIN_INT4_IRQn 

14 GPIO 4

TIMER3_IRQn 

15 TIMER3

MCPWM_IRQn 

16 MCPWM

ADC0_IRQn 

17 ADC0

I2C0_IRQn 

18 ORed I2C0, I2C1

I2C1_IRQn 

18 ORed I2C0, I2C1

SGPIO_INT_IRQn 

19 SGPIO

SPI_INT_IRQn 

20 ORed SPI/DAC

DAC_IRQn 

20 ORed SPI/DAC

ADC1_IRQn 

21 ADC1

SSP0_IRQn 

22 ORed SSP0, SSP1

SSP1_IRQn 

22 ORed SSP0, SSP1

EVENTROUTER_IRQn 

23 EVENTROUTER

USART0_IRQn 

24 USART0

UART1_IRQn 

25 UART1

USART2_IRQn 

26 ORed USART2/C_CAN1

C_CAN1_IRQn 

29 ORed USART2/C_CAN1

USART3_IRQn 

27 USART3

I2S0_IRQn 

28 ORed I2S0/I2S1/QEI

I2S1_IRQn 

29 ORed I2S0/I2S1/QEI

QEI_IRQn 

29 ORed I2S0/I2S1/QEI

C_CAN0_IRQn 

29 C_CAN0

ADCHS_IRQn 

30 ADCHS interrupt

M0SUB_IRQn 

31 M0SUB

Reset_IRQn 

1 Reset Vector, invoked on Power up and warm reset

NonMaskableInt_IRQn 

2 Non maskable Interrupt, cannot be stopped or preempted

HardFault_IRQn 

3 Hard Fault, all classes of Fault

SVCall_IRQn 

11 System Service Call via SVC instruction

DebugMonitor_IRQn 

12 Debug Monitor

PendSV_IRQn 

14 Pendable request for system service

SysTick_IRQn 

15 System Tick Timer

DAC_IRQn 

0 DAC

M4_IRQn 

1 M0a

DMA_IRQn 

2 DMA

RESERVED1_IRQn 

3

SGPIO_INPUT_IRQn 

4 SGPIO Input bit match

SGPIO_MATCH_IRQn 

5 SGPIO Pattern Match

SGPIO_SHIFT_IRQn 

6 SGPIO Shift Clock

SGPIO_POS_IRQn 

7 SGPIO Capture Clock

USB0_IRQn 

8 USB0

USB1_IRQn 

9 USB1

SCT_IRQn 

10 SCT

RITIMER_IRQn 

11 RITIMER

GINT1_IRQn 

12 GINT1

TIMER1_IRQn 

13 TIMER1

TIMER2_IRQn 

14 TIMER2

PIN_INT5_IRQn 

15 GPIO Pin interrupt 5

MCPWM_IRQn 

16 MCPWM

ADC0_IRQn 

17 ADC0

I2C0_IRQn 

18 I2C0

I2C1_IRQn 

19 I2C1

SPI_INT_IRQn 

20 SPI_INT

ADC1_IRQn 

21 ADC1

SSP0_IRQn 

22 ORed SSP0, SSP1

SSP1_IRQn 

22 ORed SSP0, SSP1

EVENTROUTER_IRQn 

23 EVENTROUTER

USART0_IRQn 

24 USART0

UART1_IRQn 

25 UART1

USART2_IRQn 

26 ORed USART2/C_CAN1

C_CAN1_IRQn 

26 ORed USART2/C_CAN1

USART3_IRQn 

27 USART3

I2S0_IRQn 

28 ORed I2S0, I2S1

I2S1_IRQn 

28 ORed I2S0, I2S1

C_CAN0_IRQn 

29 C_CAN0

ADCHS_IRQn 

30 ADCHS interrupt

M0APP_IRQn 

31 M0SUB

Definition at line 80 of file cmsis_43xx_m0sub.h.