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LPCOpen Platform for LPC18XX/43XX microcontrollers
18XX43XX
LPCOpen Platform for the NXP LPC18XX/43XX family of Microcontrollers
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SD/MMC & SDIO register block structure.
Definition at line 47 of file sdif_18xx_43xx.h.
#include "sdif_18xx_43xx.h"
Data Fields | |
| __IO uint32_t | CTRL |
| __IO uint32_t | PWREN |
| __IO uint32_t | CLKDIV |
| __IO uint32_t | CLKSRC |
| __IO uint32_t | CLKENA |
| __IO uint32_t | TMOUT |
| __IO uint32_t | CTYPE |
| __IO uint32_t | BLKSIZ |
| __IO uint32_t | BYTCNT |
| __IO uint32_t | INTMASK |
| __IO uint32_t | CMDARG |
| __IO uint32_t | CMD |
| __I uint32_t | RESP0 |
| __I uint32_t | RESP1 |
| __I uint32_t | RESP2 |
| __I uint32_t | RESP3 |
| __I uint32_t | MINTSTS |
| __IO uint32_t | RINTSTS |
| __I uint32_t | STATUS |
| __IO uint32_t | FIFOTH |
| __I uint32_t | CDETECT |
| __I uint32_t | WRTPRT |
| __IO uint32_t | GPIO |
| __I uint32_t | TCBCNT |
| __I uint32_t | TBBCNT |
| __IO uint32_t | DEBNCE |
| __IO uint32_t | USRID |
| __I uint32_t | VERID |
| __I uint32_t | RESERVED0 |
| __IO uint32_t | UHS_REG |
| __IO uint32_t | RST_N |
| __I uint32_t | RESERVED1 |
| __IO uint32_t | BMOD |
| __O uint32_t | PLDMND |
| __IO uint32_t | DBADDR |
| __IO uint32_t | IDSTS |
| __IO uint32_t | IDINTEN |
| __I uint32_t | DSCADDR |
| __I uint32_t | BUFADDR |
| __IO uint32_t BLKSIZ |
Block Size Register
Definition at line 55 of file sdif_18xx_43xx.h.
| __IO uint32_t BMOD |
Bus Mode Register
Definition at line 80 of file sdif_18xx_43xx.h.
| __I uint32_t BUFADDR |
Current Buffer Descriptor Address Register
Definition at line 86 of file sdif_18xx_43xx.h.
| __IO uint32_t BYTCNT |
Byte Count Register
Definition at line 56 of file sdif_18xx_43xx.h.
| __I uint32_t CDETECT |
Card Detect Register
Definition at line 68 of file sdif_18xx_43xx.h.
| __IO uint32_t CLKDIV |
Clock Divider Register
Definition at line 50 of file sdif_18xx_43xx.h.
| __IO uint32_t CLKENA |
Clock Enable Register
Definition at line 52 of file sdif_18xx_43xx.h.
| __IO uint32_t CLKSRC |
SD Clock Source Register
Definition at line 51 of file sdif_18xx_43xx.h.
| __IO uint32_t CMD |
Command Register
Definition at line 59 of file sdif_18xx_43xx.h.
| __IO uint32_t CMDARG |
Command Argument Register
Definition at line 58 of file sdif_18xx_43xx.h.
| __IO uint32_t CTRL |
< SDMMC Structure Control Register
Definition at line 48 of file sdif_18xx_43xx.h.
| __IO uint32_t CTYPE |
Card Type Register
Definition at line 54 of file sdif_18xx_43xx.h.
| __IO uint32_t DBADDR |
Descriptor List Base Address Register
Definition at line 82 of file sdif_18xx_43xx.h.
| __IO uint32_t DEBNCE |
Debounce Count Register
Definition at line 73 of file sdif_18xx_43xx.h.
| __I uint32_t DSCADDR |
Current Host Descriptor Address Register
Definition at line 85 of file sdif_18xx_43xx.h.
| __IO uint32_t FIFOTH |
FIFO Threshold Watermark Register
Definition at line 67 of file sdif_18xx_43xx.h.
| __IO uint32_t GPIO |
General Purpose Input/Output Register
Definition at line 70 of file sdif_18xx_43xx.h.
| __IO uint32_t IDINTEN |
Internal DMAC Interrupt Enable Register
Definition at line 84 of file sdif_18xx_43xx.h.
| __IO uint32_t IDSTS |
Internal DMAC Status Register
Definition at line 83 of file sdif_18xx_43xx.h.
| __IO uint32_t INTMASK |
Interrupt Mask Register
Definition at line 57 of file sdif_18xx_43xx.h.
| __I uint32_t MINTSTS |
Masked Interrupt Status Register
Definition at line 64 of file sdif_18xx_43xx.h.
| __O uint32_t PLDMND |
Poll Demand Register
Definition at line 81 of file sdif_18xx_43xx.h.
| __IO uint32_t PWREN |
Power Enable Register
Definition at line 49 of file sdif_18xx_43xx.h.
| __I uint32_t RESERVED0 |
Definition at line 76 of file sdif_18xx_43xx.h.
| __I uint32_t RESERVED1 |
Definition at line 79 of file sdif_18xx_43xx.h.
| __I uint32_t RESP0 |
Response Register 0
Definition at line 60 of file sdif_18xx_43xx.h.
| __I uint32_t RESP1 |
Response Register 1
Definition at line 61 of file sdif_18xx_43xx.h.
| __I uint32_t RESP2 |
Response Register 2
Definition at line 62 of file sdif_18xx_43xx.h.
| __I uint32_t RESP3 |
Response Register 3
Definition at line 63 of file sdif_18xx_43xx.h.
| __IO uint32_t RINTSTS |
Raw Interrupt Status Register
Definition at line 65 of file sdif_18xx_43xx.h.
| __IO uint32_t RST_N |
Hardware Reset
Definition at line 78 of file sdif_18xx_43xx.h.
| __I uint32_t STATUS |
Status Register
Definition at line 66 of file sdif_18xx_43xx.h.
| __I uint32_t TBBCNT |
Transferred Host to BIU-FIFO Byte Count Register
Definition at line 72 of file sdif_18xx_43xx.h.
| __I uint32_t TCBCNT |
Transferred CIU Card Byte Count Register
Definition at line 71 of file sdif_18xx_43xx.h.
| __IO uint32_t TMOUT |
Timeout Register
Definition at line 53 of file sdif_18xx_43xx.h.
| __IO uint32_t UHS_REG |
UHS-1 Register
Definition at line 77 of file sdif_18xx_43xx.h.
| __IO uint32_t USRID |
User ID Register
Definition at line 74 of file sdif_18xx_43xx.h.
| __I uint32_t VERID |
Version ID Register
Definition at line 75 of file sdif_18xx_43xx.h.
| __I uint32_t WRTPRT |
Write Protect Register
Definition at line 69 of file sdif_18xx_43xx.h.
1.8.3.1