LPCOpen Platform for LPC18XX/43XX microcontrollers
18XX43XX
LPCOpen Platform for the NXP LPC18XX/43XX family of Microcontrollers
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cguccu_18xx_43xx.h
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/*
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* @brief CGU/CCU registers and control functions
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*
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* @note
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* Copyright(C) NXP Semiconductors, 2012
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* All rights reserved.
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*
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* @par
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* Software that is described herein is for illustrative purposes only
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* which provides customers with programming information regarding the
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* LPC products. This software is supplied "AS IS" without any warranties of
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* any kind, and NXP Semiconductors and its licensor disclaim any and
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* all warranties, express or implied, including all implied warranties of
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* merchantability, fitness for a particular purpose and non-infringement of
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* intellectual property rights. NXP Semiconductors assumes no responsibility
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* or liability for the use of the software, conveys no license or rights under any
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* patent, copyright, mask work right, or any other intellectual property rights in
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* or to any products. NXP Semiconductors reserves the right to make changes
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* in the software without notification. NXP Semiconductors also makes no
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* representation or warranty that such application will be suitable for the
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* specified use without further testing or modification.
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*
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* @par
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* Permission to use, copy, modify, and distribute this software and its
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* documentation is hereby granted, under NXP Semiconductors' and its
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* licensor's relevant copyrights in the software, without fee, provided that it
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* is used in conjunction with NXP Semiconductors microcontrollers. This
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* copyright, permission, and disclaimer notice must appear in all copies of
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* this code.
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*/
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#ifndef __CGUCCU_18XX_43XX_H_
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#define __CGUCCU_18XX_43XX_H_
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#include "
chip_clocks.h
"
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#ifdef __cplusplus
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extern
"C"
{
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#endif
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typedef
enum
CHIP_CGU_USB_AUDIO_PLL {
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CGU_USB_PLL
,
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CGU_AUDIO_PLL
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}
CHIP_CGU_USB_AUDIO_PLL_T
;
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typedef
struct
{
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__I uint32_t
PLL_STAT
;
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__IO uint32_t
PLL_CTRL
;
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__IO uint32_t
PLL_MDIV
;
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__IO uint32_t
PLL_NP_DIV
;
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}
CGU_PLL_REG_T
;
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typedef
struct
{
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__I uint32_t RESERVED0[5];
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__IO uint32_t
FREQ_MON
;
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__IO uint32_t
XTAL_OSC_CTRL
;
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CGU_PLL_REG_T
PLL[
CGU_AUDIO_PLL
+ 1];
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__IO uint32_t
PLL0AUDIO_FRAC
;
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__I uint32_t
PLL1_STAT
;
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__IO uint32_t
PLL1_CTRL
;
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__IO uint32_t IDIV_CTRL[
CLK_IDIV_LAST
];
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__IO uint32_t BASE_CLK[
CLK_BASE_LAST
];
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}
LPC_CGU_T
;
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typedef
struct
{
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__IO uint32_t
CFG
;
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__I uint32_t
STAT
;
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}
CCU_CFGSTAT_T
;
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typedef
struct
{
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__IO uint32_t
PM
;
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__I uint32_t
BASE_STAT
;
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__I uint32_t RESERVED0[62];
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CCU_CFGSTAT_T
CLKCCU[
CLK_CCU1_LAST
];
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}
LPC_CCU1_T
;
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typedef
struct
{
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__IO uint32_t
PM
;
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__I uint32_t
BASE_STAT
;
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__I uint32_t RESERVED0[62];
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CCU_CFGSTAT_T
CLKCCU[
CLK_CCU2_LAST
-
CLK_CCU1_LAST
];
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}
LPC_CCU2_T
;
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#ifdef __cplusplus
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}
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#endif
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#endif
/* __CGUCCU_18XX_43XX_H_ */
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