LPCOpen Platform for LPC18XX/43XX microcontrollers
18XX43XX
LPCOpen Platform for the NXP LPC18XX/43XX family of Microcontrollers
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cmsis_18xx.h
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/*
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* @brief Basic CMSIS include file for LPC18XX
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*
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* @note
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* Copyright(C) NXP Semiconductors, 2013
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* All rights reserved.
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*
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* @par
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* Software that is described herein is for illustrative purposes only
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* which provides customers with programming information regarding the
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* LPC products. This software is supplied "AS IS" without any warranties of
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* any kind, and NXP Semiconductors and its licensor disclaim any and
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* all warranties, express or implied, including all implied warranties of
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* merchantability, fitness for a particular purpose and non-infringement of
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* intellectual property rights. NXP Semiconductors assumes no responsibility
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* or liability for the use of the software, conveys no license or rights under any
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* patent, copyright, mask work right, or any other intellectual property rights in
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* or to any products. NXP Semiconductors reserves the right to make changes
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* in the software without notification. NXP Semiconductors also makes no
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* representation or warranty that such application will be suitable for the
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* specified use without further testing or modification.
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*
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* @par
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* Permission to use, copy, modify, and distribute this software and its
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* documentation is hereby granted, under NXP Semiconductors' and its
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* licensor's relevant copyrights in the software, without fee, provided that it
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* is used in conjunction with NXP Semiconductors microcontrollers. This
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* copyright, permission, and disclaimer notice must appear in all copies of
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* this code.
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*/
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#ifndef __CMSIS_18XX_H_
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#define __CMSIS_18XX_H_
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#ifndef __CMSIS_H_
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#error "cmsis_18xx.h should not be included directly use cmsis.h instead"
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#endif
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#ifdef __cplusplus
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extern
"C"
{
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#endif
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#if defined(__ARMCC_VERSION)
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#pragma diag_suppress 2525
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#pragma push
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#pragma anon_unions
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#elif defined(__CWCC__)
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#pragma push
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#pragma cpp_extensions on
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#elif defined(__GNUC__)
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/* anonymous unions are enabled by default */
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#elif defined(__IAR_SYSTEMS_ICC__)
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#pragma language=extended
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#else
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#error Not supported compiler type
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#endif
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#define __CM3_REV 0x0201
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#define __MPU_PRESENT 1
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#define __NVIC_PRIO_BITS 3
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#define __Vendor_SysTickConfig 0
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#define __FPU_PRESENT 0
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typedef enum {
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/* ------------------------- Cortex-M3 Processor Exceptions Numbers ----------------------------- */
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Reset_IRQn
= -15,
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NonMaskableInt_IRQn
= -14,
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HardFault_IRQn
= -13,
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MemoryManagement_IRQn
= -12,
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BusFault_IRQn
= -11,
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UsageFault_IRQn
= -10,
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SVCall_IRQn
= -5,
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DebugMonitor_IRQn
= -4,
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PendSV_IRQn
= -2,
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SysTick_IRQn
= -1,
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/* --------------------------- LPC18xx/43xx Specific Interrupt Numbers ------------------------------- */
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DAC_IRQn
= 0,
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RESERVED0_IRQn
= 1,
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DMA_IRQn
= 2,
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RESERVED1_IRQn
= 3,
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RESERVED2_IRQn
= 4,
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ETHERNET_IRQn
= 5,
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SDIO_IRQn
= 6,
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LCD_IRQn
= 7,
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USB0_IRQn
= 8,
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USB1_IRQn
= 9,
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SCT_IRQn
= 10,
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RITIMER_IRQn
= 11,
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TIMER0_IRQn
= 12,
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TIMER1_IRQn
= 13,
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TIMER2_IRQn
= 14,
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TIMER3_IRQn
= 15,
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MCPWM_IRQn
= 16,
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ADC0_IRQn
= 17,
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I2C0_IRQn
= 18,
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I2C1_IRQn
= 19,
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RESERVED3_IRQn
= 20,
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ADC1_IRQn
= 21,
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SSP0_IRQn
= 22,
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SSP1_IRQn
= 23,
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USART0_IRQn
= 24,
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UART1_IRQn
= 25,
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USART2_IRQn
= 26,
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USART3_IRQn
= 27,
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I2S0_IRQn
= 28,
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I2S1_IRQn
= 29,
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RESERVED4_IRQn
= 30,
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RESERVED5_IRQn
= 31,
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PIN_INT0_IRQn
= 32,
127
PIN_INT1_IRQn
= 33,
128
PIN_INT2_IRQn
= 34,
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PIN_INT3_IRQn
= 35,
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PIN_INT4_IRQn
= 36,
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PIN_INT5_IRQn
= 37,
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PIN_INT6_IRQn
= 38,
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PIN_INT7_IRQn
= 39,
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GINT0_IRQn
= 40,
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GINT1_IRQn
= 41,
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EVENTROUTER_IRQn
= 42,
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C_CAN1_IRQn
= 43,
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RESERVED6_IRQn
= 44,
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RESERVED7_IRQn
= 45,
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ATIMER_IRQn
= 46,
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RTC_IRQn
= 47,
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RESERVED8_IRQn
= 48,
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WWDT_IRQn
= 49,
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RESERVED9_IRQn
= 50,
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C_CAN0_IRQn
= 51,
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QEI_IRQn
= 52,
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}
LPC18XX_IRQn_Type
;
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typedef
LPC18XX_IRQn_Type
IRQn_Type
;
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/* Cortex-M3 processor and core peripherals */
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#include "core_cm3.h"
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#ifdef __cplusplus
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}
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#endif
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#endif
/* ifndef __CMSIS_18XX_H_ */
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