LPCOpen Platform for LPC18XX/43XX microcontrollers: C:/w/lpcopen_docs/software/lpc_core/lpc_chip/chip_18xx_43xx/hsadc_18xx_43xx.h File Reference

| LPCOpen Platform for LPC18XX/43XX microcontrollers 18XX43XX LPCOpen Platform for the NXP LPC18XX/43XX family of Microcontrollers

- Main Page
- Modules
- Data Structures
- Files

- File List
- Globals

Data Structures | Macros | Enumerations | Functions
hsadc_18xx_43xx.h File Reference

Go to the source code of this file.

## Data Structures
struct | HSADCINTCTRL_T
| High speed ADC interrupt control structure. More...
struct | LPC_HSADC_T
| HSADC register block structure. More...

## Macros
#define | HSADC_MAX_SAMPLEVAL 0xFFF
#define | HSADC_LS_DONE (1 << 0)
#define | HSADC_LS_OVERRUN (1 << 1)
#define | HSADC_LS_RANGE_IN (0 << 2)
#define | HSADC_LS_RANGE_BELOW (1 << 2)
#define | HSADC_LS_RANGE_ABOVE (2 << 2)
#define | HSADC_LS_RANGE(val) ((val) & 0xC)
#define | HSADC_LS_CROSSING_NONE (0 << 4)
#define | HSADC_LS_CROSSING_DOWN (1 << 4)
#define | HSADC_LS_CROSSING_UP (2 << 4)
#define | HSADC_LS_CROSSING(val) ((val) & 0x30)
#define | HSADC_LS_DATA(val) ((val) >> 6)
#define | HSADC_FIFO_SAMPLE_MASK (0xFFF)
#define | HSADC_FIFO_SAMPLE(val) ((val) & 0xFFF)
#define | HSADC_FIFO_CHAN_ID_MASK (0x7000)
#define | HSADC_FIFO_CHAN_ID(val) (((val) >> 12) & 0x7)
#define | HSADC_FIFO_EMPTY (0x1 << 15)
#define | HSADC_FIFO_SHIFTPACKED(val) ((val) >> 16)
#define | HSADC_FIFO_PACKEDMASK (1UL << 31)
#define | HSADC_DESC_CH(ch) (ch)
#define | HSADC_DESC_HALT (1 << 3)
#define | HSADC_DESC_INT (1 << 4)
#define | HSADC_DESC_POWERDOWN (1 << 5)
#define | HSADC_DESC_BRANCH_NEXT (0 << 6)
#define | HSADC_DESC_BRANCH_FIRST (1 << 6)
#define | HSADC_DESC_BRANCH_SWAP (2 << 6)
#define | HSADC_DESC_MATCH(val) ((val) << 8)
#define | HSADC_DESC_THRESH_NONE (0 << 22)
#define | HSADC_DESC_THRESH_A (1 << 22)
#define | HSADC_DESC_THRESH_B (2 << 22)
#define | HSADC_DESC_RESET_TIMER (1 << 24)
#define | HSADC_DESC_UPDATE_TABLE (1UL << 31)
#define | HSADC_INT0_FIFO_FULL (1 << 0)
#define | HSADC_INT0_FIFO_EMPTY (1 << 1)
#define | HSADC_INT0_FIFO_OVERFLOW (1 << 2)
#define | HSADC_INT0_DSCR_DONE (1 << 3)
#define | HSADC_INT0_DSCR_ERROR (1 << 4)
#define | HSADC_INT0_ADC_OVF (1 << 5)
#define | HSADC_INT0_ADC_UNF (1 << 6)
#define | HSADC_INT1_THCMP_BRANGE(ch) (1 << ((ch * 5) + 0))
#define | HSADC_INT1_THCMP_ARANGE(ch) (1 << ((ch * 5) + 1))
#define | HSADC_INT1_THCMP_DCROSS(ch) (1 << ((ch * 5) + 2))
#define | HSADC_INT1_THCMP_UCROSS(ch) (1 << ((ch * 5) + 3))
#define | HSADC_INT1_OVERRUN(ch) (1 << ((ch * 5) + 4))

## Enumerations
enum | HSADC_TRIGGER_MASK_T { HSADC_CONFIG_TRIGGER_OFF = 0, HSADC_CONFIG_TRIGGER_SW = 1, HSADC_CONFIG_TRIGGER_EXT = 2, HSADC_CONFIG_TRIGGER_BOTH = 3 }
enum | HSADC_TRIGGER_MODE_T { HSADC_CONFIG_TRIGGER_RISEEXT = (0 << 2), HSADC_CONFIG_TRIGGER_FALLEXT = (1 << 2), HSADC_CONFIG_TRIGGER_LOWEXT = (2 << 2), HSADC_CONFIG_TRIGGER_HIGHEXT = (3 << 2) }
enum | HSADC_TRIGGER_SYNC_T { HSADC_CONFIG_TRIGGER_NOEXTSYNC = (0 << 4), HSADC_CONFIG_TRIGGER_EXTSYNC = (1 << 4) }
enum | HSADC_CHANNEL_ID_EN_T { HSADC_CHANNEL_ID_EN_NONE = (0 << 5), HSADC_CHANNEL_ID_EN_ADD = (1 << 5) }
enum | HSADC_DCBIAS_T { HSADC_CHANNEL_NODCBIAS = 0, HSADC_CHANNEL_DCBIAS = 1 }

## Functions
void | Chip_HSADC_Init (LPC_HSADC_T *pHSADC)
| Initialize the High speed ADC. More...
void | Chip_HSADC_DeInit (LPC_HSADC_T *pHSADC)
| Shutdown HSADC. More...
STATIC INLINE void | Chip_HSADC_FlushFIFO (LPC_HSADC_T *pHSADC)
| Flush High speed ADC FIFO. More...
STATIC INLINE void | Chip_HSADC_LoadDMADesc (LPC_HSADC_T *pHSADC)
| Load a descriptor table from memory by requesting a DMA write. More...
STATIC INLINE uint32_t | Chip_HSADC_GetFIFOLevel (LPC_HSADC_T *pHSADC)
| Returns current HSADC FIFO fill level. More...
void | Chip_HSADC_SetupFIFO (LPC_HSADC_T *pHSADC, uint8_t trip, bool packed)
| Sets up HSADC FIFO trip level and packing. More...
STATIC INLINE void | Chip_HSADC_SWTrigger (LPC_HSADC_T *pHSADC)
| Starts a manual (software) trigger of HSADC descriptors. More...
STATIC INLINE void | Chip_HSADC_SetActiveDescriptor (LPC_HSADC_T *pHSADC, uint8_t table, uint8_t desc)
| Set active table descriptor index and number. More...
STATIC INLINE uint8_t | Chip_HSADC_GetActiveDescriptorIndex (LPC_HSADC_T *pHSADC)
| Returns currently active descriptor index being processed. More...
STATIC INLINE uint8_t | Chip_HSADC_GetActiveDescriptorTable (LPC_HSADC_T *pHSADC)
| Returns currently active descriptor table being processed. More...
STATIC INLINE void | Chip_HSADC_EnablePowerDownMode (LPC_HSADC_T *pHSADC)
| Enables ADC power down mode. More...
STATIC INLINE void | Chip_HSADC_DisablePowerDownMode (LPC_HSADC_T *pHSADC)
| Disables ADC power down mode. More...
STATIC INLINE void | Chip_HSADC_ConfigureTrigger (LPC_HSADC_T *pHSADC, HSADC_TRIGGER_MASK_T mask, HSADC_TRIGGER_MODE_T mode, HSADC_TRIGGER_SYNC_T sync, HSADC_CHANNEL_ID_EN_T chID, uint16_t recoveryTime)
| Configure HSADC trigger source and recovery time. More...
void | Chip_HSADC_SetThrLowValue (LPC_HSADC_T *pHSADC, uint8_t thrnum, uint16_t value)
| Set HSADC Threshold low value. More...
void | Chip_HSADC_SetThrHighValue (LPC_HSADC_T *pHSADC, uint8_t thrnum, uint16_t value)
| Set HSADC Threshold high value. More...
STATIC INLINE uint32_t | Chip_HSADC_GetLastSample (LPC_HSADC_T *pHSADC, uint8_t channel)
| Read a ADC last sample register. More...
void | Chip_HSADC_SetSpeed (LPC_HSADC_T *pHSADC, uint8_t channel, uint8_t speed)
| Setup speed for a input channel. More...
void | Chip_HSADC_SetPowerSpeed (LPC_HSADC_T *pHSADC, bool comp2)
| Setup (common) HSADC power and speed settings. More...
void | Chip_HSADC_SetACDCBias (LPC_HSADC_T *pHSADC, uint8_t channel, HSADC_DCBIAS_T dcInNeg, HSADC_DCBIAS_T dcInPos)
| Setup AC-DC coupling selection for a channel. More...
STATIC INLINE void | Chip_HSADC_EnablePower (LPC_HSADC_T *pHSADC)
| Enable HSADC power control and band gap reference. More...
STATIC INLINE void | Chip_HSADC_DisablePower (LPC_HSADC_T *pHSADC)
| Disable HSADC power control and band gap reference. More...
STATIC INLINE uint32_t | Chip_HSADC_GetFIFO (LPC_HSADC_T *pHSADC)
| Reads the HSADC FIFO. More...
STATIC INLINE void | Chip_HSADC_SetupDescEntry (LPC_HSADC_T *pHSADC, uint8_t table, uint8_t descNo, uint32_t desc)
| Sets up a raw HSADC descriptor entry. More...
STATIC INLINE void | Chip_HSADC_UpdateDescTable (LPC_HSADC_T *pHSADC, uint8_t table)
| Update all descriptors of a table. More...
STATIC INLINE void | Chip_HSADC_EnableInts (LPC_HSADC_T *pHSADC, uint8_t intGrp, uint32_t intMask)
| Enable an interrupt for HSADC interrupt group 0 or 1. More...
STATIC INLINE void | Chip_HSADC_DisableInts (LPC_HSADC_T *pHSADC, uint8_t intGrp, uint32_t intMask)
| Disables an interrupt for HSADC interrupt group 0 or 1. More...
STATIC INLINE uint32_t | Chip_HSADC_GetEnabledInts (LPC_HSADC_T *pHSADC, uint8_t intGrp)
| Returns enabled interrupt for HSADC interrupt group 0 or 1. More...
STATIC INLINE uint32_t | Chip_HSADC_GetIntStatus (LPC_HSADC_T *pHSADC, uint8_t intGrp)
| Returns status for HSADC interrupt group 0 or 1. More...
STATIC INLINE void | Chip_HSADC_ClearIntStatus (LPC_HSADC_T *pHSADC, uint8_t intGrp, uint32_t stsMask)
| Clear a status for HSADC interrupt group 0 or 1. More...
STATIC INLINE void | Chip_HSADC_SetIntStatus (LPC_HSADC_T *pHSADC, uint8_t intGrp, uint32_t stsMask)
| Sets a status for HSADC interrupt group 0 or 1. More...
STATIC INLINE uint32_t | Chip_HSADC_GetBaseClockRate (LPC_HSADC_T *pHSADC)
| Returns the clock rate in Hz for the HSADC. More...