LPCOpen Platform for LPC18XX/43XX microcontrollers: CHIP: LPC18xx/43xx CREG driver

| LPCOpen Platform for LPC18XX/43XX microcontrollers 18XX43XX LPCOpen Platform for the NXP LPC18XX/43XX family of Microcontrollers

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Data Structures | Enumerations | Functions
CHIP: LPC18xx/43xx CREG driver
LPC18xx/43xx chip specific drivers

## Detailed Description

## Data Structures
struct | LPC_CREG_T
| CREG Register Block. More...

## Enumerations
enum | CREG_FLASHTIM_T { FLASHTIM_20MHZ_CPU = 0, FLASHTIM_40MHZ_CPU = 1, FLASHTIM_60MHZ_CPU = 2, FLASHTIM_80MHZ_CPU = 3, FLASHTIM_100MHZ_CPU = 4, FLASHTIM_120MHZ_CPU = 5, FLASHTIM_150MHZ_CPU = 6, FLASHTIM_170MHZ_CPU = 7, FLASHTIM_190MHZ_CPU = 8, FLASHTIM_SAFE_SETTING = 9 }
| FLASH Access time definitions. More...

## Functions
STATIC INLINE uint32_t | Chip_CREG_OnChipFlashIsPresent (void)
| Identifies whether on-chip flash is present. More...
STATIC INLINE void | Chip_CREG_SetFlashAcceleration (uint32_t Hz)
| Configures the onboard Flash Accelerator in flash-based LPC18xx/LPC43xx parts. More...
STATIC INLINE void | Chip_CREG_SetFLASHAccess (CREG_FLASHTIM_T clks)
| Set FLASH memory access time in clocks. More...
STATIC INLINE void | Chip_CREG_EnableUSB0Phy (void)
| Enables the USB0 high-speed PHY on LPC18xx/LPC43xx parts. More...
STATIC INLINE void | Chip_CREG_DisableUSB0Phy (void)
| Disable the USB0 high-speed PHY on LPC18xx/LPC43xx parts. More...
STATIC INLINE void | Chip_CREG_ConfigureBODaR (uint32_t BODVL, uint32_t BORVL)
| Configures the BOD and Reset on LPC18xx/LPC43xx parts. More...

## Enumeration Type Documentation

enum CREG_FLASHTIM_T

FLASH Access time definitions.

Enumerator
FLASHTIM_20MHZ_CPU | Flash accesses use 1 CPU clocks. Use for up to 20 MHz CPU clock
FLASHTIM_40MHZ_CPU | Flash accesses use 2 CPU clocks. Use for up to 40 MHz CPU clock
FLASHTIM_60MHZ_CPU | Flash accesses use 3 CPU clocks. Use for up to 60 MHz CPU clock
FLASHTIM_80MHZ_CPU | Flash accesses use 4 CPU clocks. Use for up to 80 MHz CPU clock
FLASHTIM_100MHZ_CPU | Flash accesses use 5 CPU clocks. Use for up to 100 MHz CPU clock
FLASHTIM_120MHZ_CPU | Flash accesses use 6 CPU clocks. Use for up to 120 MHz CPU clock
FLASHTIM_150MHZ_CPU | Flash accesses use 7 CPU clocks. Use for up to 150 Mhz CPU clock
FLASHTIM_170MHZ_CPU | Flash accesses use 8 CPU clocks. Use for up to 170 MHz CPU clock
FLASHTIM_190MHZ_CPU | Flash accesses use 9 CPU clocks. Use for up to 190 MHz CPU clock
FLASHTIM_SAFE_SETTING | Flash accesses use 10 CPU clocks. Safe setting for any allowed conditions

Definition at line 119 of file creg_18xx_43xx.h.

## Function Documentation

STATIC INLINE void Chip_CREG_ConfigureBODaR | ( | uint32_t | BODVL,
|  | uint32_t | BORVL
| ) |  |

Configures the BOD and Reset on LPC18xx/LPC43xx parts.

Parameters

  BODVL | : Brown-Out Detect voltage level (0-3)
  BORVL | : Brown-Out Reset voltage level (0-3)

Returns
  Nothing

Definition at line 176 of file creg_18xx_43xx.h.

STATIC INLINE void Chip_CREG_DisableUSB0Phy | ( | void |  | ) |

Disable the USB0 high-speed PHY on LPC18xx/LPC43xx parts.

Returns
  Nothing

Note
  The USB0 PLL & clock should be configured before calling this function. This function should be called before the USB0 registers are accessed.

Definition at line 165 of file creg_18xx_43xx.h.

STATIC INLINE void Chip_CREG_EnableUSB0Phy | ( | void |  | ) |

Enables the USB0 high-speed PHY on LPC18xx/LPC43xx parts.

Returns
  Nothing

Note
  The USB0 PLL & clock should be configured before calling this function. This function should be called before the USB0 registers are accessed.

Definition at line 154 of file creg_18xx_43xx.h.

STATIC INLINE uint32_t Chip_CREG_OnChipFlashIsPresent | ( | void |  | ) |

Identifies whether on-chip flash is present.

Returns
  true if on chip flash is available, otherwise false

Definition at line 95 of file creg_18xx_43xx.h.

STATIC INLINE void Chip_CREG_SetFlashAcceleration | ( | uint32_t | Hz | ) |

Configures the onboard Flash Accelerator in flash-based LPC18xx/LPC43xx parts.

Parameters

  Hz | : Current frequency in Hz of the CPU

Returns
  Nothing This function should be called with the higher frequency before the clock frequency is increased and it should be called with the new lower value after the clock frequency is decreased.

Definition at line 108 of file creg_18xx_43xx.h.

STATIC INLINE void Chip_CREG_SetFLASHAccess | ( | CREG_FLASHTIM_T | clks | ) |

Set FLASH memory access time in clocks.

Parameters

  clks | : FLASH access speed rating

Returns
  Nothing

Definition at line 137 of file creg_18xx_43xx.h.