LPCOpen Platform for LPC18XX/43XX microcontrollers  18XX43XX
LPCOpen Platform for the NXP LPC18XX/43XX family of Microcontrollers
adc_18xx_43xx.c
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1 /*
2  * @brief LPC18xx/43xx A/D conversion driver
3  *
4  * @note
5  * Copyright(C) NXP Semiconductors, 2012
6  * All rights reserved.
7  *
8  * @par
9  * Software that is described herein is for illustrative purposes only
10  * which provides customers with programming information regarding the
11  * LPC products. This software is supplied "AS IS" without any warranties of
12  * any kind, and NXP Semiconductors and its licensor disclaim any and
13  * all warranties, express or implied, including all implied warranties of
14  * merchantability, fitness for a particular purpose and non-infringement of
15  * intellectual property rights. NXP Semiconductors assumes no responsibility
16  * or liability for the use of the software, conveys no license or rights under any
17  * patent, copyright, mask work right, or any other intellectual property rights in
18  * or to any products. NXP Semiconductors reserves the right to make changes
19  * in the software without notification. NXP Semiconductors also makes no
20  * representation or warranty that such application will be suitable for the
21  * specified use without further testing or modification.
22  *
23  * @par
24  * Permission to use, copy, modify, and distribute this software and its
25  * documentation is hereby granted, under NXP Semiconductors' and its
26  * licensor's relevant copyrights in the software, without fee, provided that it
27  * is used in conjunction with NXP Semiconductors microcontrollers. This
28  * copyright, permission, and disclaimer notice must appear in all copies of
29  * this code.
30  */
31 
32 #include "chip.h"
33 
34 /*****************************************************************************
35  * Private types/enumerations/variables
36  ****************************************************************************/
37 
38 /*****************************************************************************
39  * Public types/enumerations/variables
40  ****************************************************************************/
41 
42 /*****************************************************************************
43  * Private functions
44  ****************************************************************************/
45 
46 /* Get the number of clock for a full conversion */
48 {
49  return 11;
50 }
51 
52 /* Returns clock index for the peripheral block */
54 {
55  CHIP_CCU_CLK_T clkADC;
56 
57  if (pADC == LPC_ADC1) {
58  clkADC = CLK_APB3_ADC1;
59  }
60  else {
61  clkADC = CLK_APB3_ADC0;
62  }
63 
64  return clkADC;
65 }
66 
67 /* Get divider value */
68 STATIC uint8_t getClkDiv(LPC_ADC_T *pADC, bool burstMode, uint32_t adcRate, uint8_t clks)
69 {
70  uint32_t adcBlockFreq;
71  uint32_t fullAdcRate;
72  uint8_t div;
73 
74  /* The APB clock (PCLK_ADC0) is divided by (CLKDIV+1) to produce the clock for
75  A/D converter, which should be less than or equal to 4.5MHz.
76  A fully conversion requires (bits_accuracy+1) of these clocks.
77  ADC Clock = PCLK_ADC0 / (CLKDIV + 1);
78  ADC rate = ADC clock / (the number of clocks required for each conversion);
79  */
80  adcBlockFreq = Chip_Clock_GetRate(Chip_ADC_GetClockIndex(pADC));
81  if (burstMode) {
82  fullAdcRate = adcRate * clks;
83  }
84  else {
85  fullAdcRate = adcRate * getFullConvClk();
86  }
87 
88  /* Get the round value by fomular: (2*A + B)/(2*B) */
89  div = ((adcBlockFreq * 2 + fullAdcRate) / (fullAdcRate * 2)) - 1;
90  return div;
91 }
92 
93 /* Set start mode for ADC */
94 void setStartMode(LPC_ADC_T *pADC, uint8_t start_mode)
95 {
96  uint32_t temp;
97  temp = pADC->CR & (~ADC_CR_START_MASK);
98  pADC->CR = temp | (ADC_CR_START_MODE_SEL((uint32_t) start_mode));
99 }
100 
101 /* Get the ADC value */
102 Status readAdcVal(LPC_ADC_T *pADC, uint8_t channel, uint16_t *data)
103 {
104  uint32_t temp;
105  temp = pADC->DR[channel];
106  if (!ADC_DR_DONE(temp)) {
107  return ERROR;
108  }
109  /* if(ADC_DR_OVERRUN(temp) && (pADC->CR & ADC_CR_BURST)) */
110  /* return ERROR; */
111  *data = (uint16_t) ADC_DR_RESULT(temp);
112  return SUCCESS;
113 }
114 
115 /*****************************************************************************
116  * Public functions
117  ****************************************************************************/
118 
119 /* Initialize the ADC peripheral and the ADC setup structure to default value */
121 {
122  uint8_t div;
123  uint32_t cr = 0;
124  uint32_t clk;
125 
126  Chip_Clock_EnableOpts(Chip_ADC_GetClockIndex(pADC), true, true, 1);
127 
128  pADC->INTEN = 0; /* Disable all interrupts */
129 
130  cr |= ADC_CR_PDN;
131  ADCSetup->adcRate = ADC_MAX_SAMPLE_RATE;
132  ADCSetup->bitsAccuracy = ADC_10BITS;
133  clk = 11;
134  ADCSetup->burstMode = false;
135  div = getClkDiv(pADC, false, ADCSetup->adcRate, clk);
136  cr |= ADC_CR_CLKDIV(div);
137  cr |= ADC_CR_BITACC(ADCSetup->bitsAccuracy);
138  pADC->CR = cr;
139 }
140 
141 /* Shutdown ADC */
143 {
144  pADC->INTEN = 0x00000100;
145  pADC->CR = 0;
147 }
148 
149 /* Get the ADC value */
150 Status Chip_ADC_ReadValue(LPC_ADC_T *pADC, uint8_t channel, uint16_t *data)
151 {
152  return readAdcVal(pADC, channel, data);
153 }
154 
155 /* Get ADC Channel status from ADC data register */
156 FlagStatus Chip_ADC_ReadStatus(LPC_ADC_T *pADC, uint8_t channel, uint32_t StatusType)
157 {
158  switch (StatusType) {
159  case ADC_DR_DONE_STAT:
160  return (pADC->STAT & (1UL << channel)) ? SET : RESET;
161 
162  case ADC_DR_OVERRUN_STAT:
163  channel += 8;
164  return (pADC->STAT & (1UL << channel)) ? SET : RESET;
165 
166  case ADC_DR_ADINT_STAT:
167  return pADC->STAT >> 16 ? SET : RESET;
168 
169  default:
170  break;
171  }
172  return RESET;
173 }
174 
175 /* Enable/Disable interrupt for ADC channel */
176 void Chip_ADC_Int_SetChannelCmd(LPC_ADC_T *pADC, uint8_t channel, FunctionalState NewState)
177 {
178  if (NewState == ENABLE) {
179  pADC->INTEN |= (1UL << channel);
180  }
181  else {
182  pADC->INTEN &= (~(1UL << channel));
183  }
184 }
185 
186 /* Select the mode starting the AD conversion */
188 {
189  if ((mode != ADC_START_NOW) && (mode != ADC_NO_START)) {
190  if (EdgeOption) {
191  pADC->CR |= ADC_CR_EDGE;
192  }
193  else {
194  pADC->CR &= ~ADC_CR_EDGE;
195  }
196  }
197  setStartMode(pADC, (uint8_t) mode);
198 }
199 
200 /* Set the ADC Sample rate */
201 void Chip_ADC_SetSampleRate(LPC_ADC_T *pADC, ADC_CLOCK_SETUP_T *ADCSetup, uint32_t rate)
202 {
203  uint8_t div;
204  uint32_t cr;
205 
206  cr = pADC->CR & (~ADC_SAMPLE_RATE_CONFIG_MASK);
207  ADCSetup->adcRate = rate;
208  div = getClkDiv(pADC, ADCSetup->burstMode, rate, (11 - ADCSetup->bitsAccuracy));
209  cr |= ADC_CR_CLKDIV(div);
210  cr |= ADC_CR_BITACC(ADCSetup->bitsAccuracy);
211  pADC->CR = cr;
212 }
213 
214 /* Set the ADC accuracy bits */
216 {
217  ADCSetup->bitsAccuracy = resolution;
218  Chip_ADC_SetSampleRate(pADC, ADCSetup, ADCSetup->adcRate);
219 }
220 
221 /* Enable or disable the ADC channel on ADC peripheral */
223 {
224  if (NewState == ENABLE) {
225  pADC->CR |= ADC_CR_CH_SEL(channel);
226  }
227  else {
228  pADC->CR &= ~ADC_CR_START_MASK;
229  pADC->CR &= ~ADC_CR_CH_SEL(channel);
230  }
231 }
232 
233 /* Enable burst mode */
235 {
236  setStartMode(pADC, ADC_NO_START);
237 
238  if (NewState == DISABLE) {
239  pADC->CR &= ~ADC_CR_BURST;
240  }
241  else {
242  pADC->CR |= ADC_CR_BURST;
243  }
244 }
245 
246 /* Read the ADC value and convert it to 8bits value */
247 Status Chip_ADC_ReadByte(LPC_ADC_T *pADC, ADC_CHANNEL_T channel, uint8_t *data)
248 {
249  uint16_t temp;
250  Status rt;
251 
252  rt = readAdcVal(pADC, channel, &temp);
253  *data = (uint8_t) temp;
254 
255  return rt;
256 }
257