LPCOpen Platform for LPC18XX/43XX microcontrollers: C:/w/lpcopen_docs/software/lpc_core/lpc_chip/chip_18xx_43xx/creg_18xx_43xx.h File Reference

| LPCOpen Platform for LPC18XX/43XX microcontrollers 18XX43XX LPCOpen Platform for the NXP LPC18XX/43XX family of Microcontrollers

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creg_18xx_43xx.h File Reference

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## Data Structures
struct | LPC_CREG_T
| CREG Register Block. More...

## Enumerations
enum | CREG_FLASHTIM_T { FLASHTIM_20MHZ_CPU = 0, FLASHTIM_40MHZ_CPU = 1, FLASHTIM_60MHZ_CPU = 2, FLASHTIM_80MHZ_CPU = 3, FLASHTIM_100MHZ_CPU = 4, FLASHTIM_120MHZ_CPU = 5, FLASHTIM_150MHZ_CPU = 6, FLASHTIM_170MHZ_CPU = 7, FLASHTIM_190MHZ_CPU = 8, FLASHTIM_SAFE_SETTING = 9 }
| FLASH Access time definitions. More...

## Functions
STATIC INLINE uint32_t | Chip_CREG_OnChipFlashIsPresent (void)
| Identifies whether on-chip flash is present. More...
STATIC INLINE void | Chip_CREG_SetFlashAcceleration (uint32_t Hz)
| Configures the onboard Flash Accelerator in flash-based LPC18xx/LPC43xx parts. More...
STATIC INLINE void | Chip_CREG_SetFLASHAccess (CREG_FLASHTIM_T clks)
| Set FLASH memory access time in clocks. More...
STATIC INLINE void | Chip_CREG_EnableUSB0Phy (void)
| Enables the USB0 high-speed PHY on LPC18xx/LPC43xx parts. More...
STATIC INLINE void | Chip_CREG_DisableUSB0Phy (void)
| Disable the USB0 high-speed PHY on LPC18xx/LPC43xx parts. More...
STATIC INLINE void | Chip_CREG_ConfigureBODaR (uint32_t BODVL, uint32_t BORVL)
| Configures the BOD and Reset on LPC18xx/LPC43xx parts. More...