![]() |
LPCOpen Platform for LPC18XX/43XX microcontrollers
18XX43XX
LPCOpen Platform for the NXP LPC18XX/43XX family of Microcontrollers
|
Go to the source code of this file.
Data Structures | |
| struct | PINMUX_GRP_T |
| Array of pin definitions passed to Chip_SCU_SetPinMuxing() must be in this format. More... | |
| struct | LPC_SCU_T |
| System Control Unit register block. More... | |
Macros | |
| #define | SCU_MODE_PULLUP (0x0 << 3) |
| #define | SCU_MODE_REPEATER (0x1 << 3) |
| #define | SCU_MODE_INACT (0x2 << 3) |
| #define | SCU_MODE_PULLDOWN (0x3 << 3) |
| #define | SCU_MODE_HIGHSPEEDSLEW_EN (0x1 << 5) |
| #define | SCU_MODE_INBUFF_EN (0x1 << 6) |
| #define | SCU_MODE_ZIF_DIS (0x1 << 7) |
| #define | SCU_MODE_4MA_DRIVESTR (0x0 << 8) |
| #define | SCU_MODE_8MA_DRIVESTR (0x1 << 8) |
| #define | SCU_MODE_14MA_DRIVESTR (0x2 << 8) |
| #define | SCU_MODE_20MA_DRIVESTR (0x3 << 8) |
| #define | SCU_MODE_FUNC0 0x0 |
| #define | SCU_MODE_FUNC1 0x1 |
| #define | SCU_MODE_FUNC2 0x2 |
| #define | SCU_MODE_FUNC3 0x3 |
| #define | SCU_MODE_FUNC4 0x4 |
| #define | SCU_MODE_FUNC5 0x5 |
| #define | SCU_MODE_FUNC6 0x6 |
| #define | SCU_MODE_FUNC7 0x7 |
| #define | SCU_PINIO_FAST (SCU_MODE_INACT | SCU_MODE_HIGHSPEEDSLEW_EN | SCU_MODE_INBUFF_EN | SCU_MODE_ZIF_DIS) |
| #define | MD_PUP (0x0 << 3) /** Enable pull-up resistor at pad */ |
| #define | MD_BUK (0x1 << 3) /** Enable pull-down and pull-up resistor at resistor at pad (repeater mode) */ |
| #define | MD_PLN (0x2 << 3) /** Disable pull-down and pull-up resistor at resistor at pad */ |
| #define | MD_PDN (0x3 << 3) /** Enable pull-down resistor at pad */ |
| #define | MD_EHS (0x1 << 5) /** Enable fast slew rate */ |
| #define | MD_EZI (0x1 << 6) /** Input buffer enable */ |
| #define | MD_ZI (0x1 << 7) /** Disable input glitch filter */ |
| #define | MD_EHD0 (0x1 << 8) /** EHD driver strength low bit */ |
| #define | MD_EHD1 (0x1 << 8) /** EHD driver strength high bit */ |
| #define | MD_PLN_FAST (MD_PLN | MD_EZI | MD_ZI | MD_EHS) |
| #define | I2C0_STANDARD_FAST_MODE (1 << 3 | 1 << 11) /** Pin configuration for STANDARD/FAST mode I2C */ |
| #define | I2C0_FAST_MODE_PLUS (2 << 1 | 1 << 3 | 1 << 7 | 1 << 10 | 1 << 11) /** Pin configuration for Fast-mode Plus I2C */ |
| #define | FUNC0 0x0 /** Pin function 0 */ |
| #define | FUNC1 0x1 /** Pin function 1 */ |
| #define | FUNC2 0x2 /** Pin function 2 */ |
| #define | FUNC3 0x3 /** Pin function 3 */ |
| #define | FUNC4 0x4 /** Pin function 4 */ |
| #define | FUNC5 0x5 /** Pin function 5 */ |
| #define | FUNC6 0x6 /** Pin function 6 */ |
| #define | FUNC7 0x7 /** Pin function 7 */ |
| #define | PORT_OFFSET 0x80 /** Port offset definition */ |
| #define | PIN_OFFSET 0x04 /** Pin offset definition */ |
| #define | LPC_SCU_PIN(LPC_SCU_BASE, po, pi) (*(volatile int *) ((LPC_SCU_BASE) + ((po) * 0x80) + ((pi) * 0x4)) |
| #define | LPC_SCU_CLK(LPC_SCU_BASE, c) (*(volatile int *) ((LPC_SCU_BASE) +0xC00 + ((c) * 0x4))) |
Functions | |
| STATIC INLINE void | Chip_SCU_PinMuxSet (uint8_t port, uint8_t pin, uint16_t modefunc) |
| Sets I/O Control pin mux. More... | |
| STATIC INLINE void | Chip_SCU_PinMux (uint8_t port, uint8_t pin, uint16_t mode, uint8_t func) |
| Configure pin function. More... | |
| STATIC INLINE void | Chip_SCU_ClockPinMuxSet (uint8_t clknum, uint16_t modefunc) |
| Configure clock pin function (pins SFSCLKx) More... | |
| STATIC INLINE void | Chip_SCU_ClockPinMux (uint8_t clknum, uint16_t mode, uint8_t func) |
| Configure clock pin function (pins SFSCLKx) More... | |
| STATIC INLINE void | Chip_SCU_GPIOIntPinSel (uint8_t PortSel, uint8_t PortNum, uint8_t PinNum) |
| GPIO Interrupt Pin Select. More... | |
| STATIC INLINE void | Chip_SCU_I2C0PinConfig (uint32_t I2C0Mode) |
| I2C Pin Configuration. More... | |
| STATIC INLINE void | Chip_SCU_ADC_Channel_Config (uint32_t ADC_ID, uint8_t channel) |
| ADC Pin Configuration. More... | |
| STATIC INLINE void | Chip_SCU_DAC_Analog_Config (void) |
| DAC Pin Configuration. More... | |
| STATIC INLINE void | Chip_SCU_SetPinMuxing (const PINMUX_GRP_T *pinArray, uint32_t arrayLength) |
| Set all I/O Control pin muxing. More... | |
1.8.3.1