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LPCOpen Platform for LPC18XX/43XX microcontrollers
18XX43XX
LPCOpen Platform for the NXP LPC18XX/43XX family of Microcontrollers
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Go to the source code of this file.
Data Structures | |
| struct | LPC_SSP_T |
| SSP register block structure. More... | |
| struct | SSP_ConfigFormat |
| struct | SPI_Address_t |
| struct | Chip_SSP_DATA_SETUP_T |
Macros | |
| #define | SSP_CR0_DSS(n) ((uint32_t) ((n) & 0xF)) |
| #define | SSP_CR0_FRF_SPI ((uint32_t) (0 << 4)) |
| #define | SSP_CR0_FRF_TI ((uint32_t) (1 << 4)) |
| #define | SSP_CR0_FRF_MICROWIRE ((uint32_t) (2 << 4)) |
| #define | SSP_CR0_CPOL_LO ((uint32_t) (0)) |
| #define | SSP_CR0_CPOL_HI ((uint32_t) (1 << 6)) |
| #define | SSP_CR0_CPHA_FIRST ((uint32_t) (0)) |
| #define | SSP_CR0_CPHA_SECOND ((uint32_t) (1 << 7)) |
| #define | SSP_CR0_SCR(n) ((uint32_t) ((n & 0xFF) << 8)) |
| #define | SSP_CR0_BITMASK ((uint32_t) (0xFFFF)) |
| #define | SSP_CR0_BITMASK ((uint32_t) (0xFFFF)) |
| #define | SSP_CR0_SCR(n) ((uint32_t) ((n & 0xFF) << 8)) |
| #define | SSP_CR1_LBM_EN ((uint32_t) (1 << 0)) |
| #define | SSP_CR1_SSP_EN ((uint32_t) (1 << 1)) |
| #define | SSP_CR1_SLAVE_EN ((uint32_t) (1 << 2)) |
| #define | SSP_CR1_MASTER_EN ((uint32_t) (0)) |
| #define | SSP_CR1_SO_DISABLE ((uint32_t) (1 << 3)) |
| #define | SSP_CR1_BITMASK ((uint32_t) (0x0F)) |
| #define | SSP_CPSR_BITMASK ((uint32_t) (0xFF)) |
| #define | SSP_DR_BITMASK(n) ((n) & 0xFFFF) |
| #define | SSP_SR_BITMASK ((uint32_t) (0x1F)) |
| #define | SSP_ICR_BITMASK ((uint32_t) (0x03)) |
| #define | SSP_CPHA_FIRST SSP_CR0_CPHA_FIRST |
| #define | SSP_CPHA_SECOND SSP_CR0_CPHA_SECOND |
| #define | SSP_CPOL_HI SSP_CR0_CPOL_LO |
| #define | SSP_CPOL_LO SSP_CR0_CPOL_HI |
| #define | SSP_SLAVE_MODE SSP_CR1_SLAVE_EN |
| #define | SSP_MASTER_MODE SSP_CR1_MASTER_EN |
Enumerations | |
| enum | SSP_STATUS_T { SSP_STAT_TFE = ((uint32_t)(1 << 0)), SSP_STAT_TNF = ((uint32_t)(1 << 1)), SSP_STAT_RNE = ((uint32_t)(1 << 2)), SSP_STAT_RFF = ((uint32_t)(1 << 3)), SSP_STAT_BSY = ((uint32_t)(1 << 4)) } |
| SSP Type of Status. More... | |
| enum | SSP_INTMASK_T { SSP_RORIM = ((uint32_t)(1 << 0)), SSP_RTIM = ((uint32_t)(1 << 1)), SSP_RXIM = ((uint32_t)(1 << 2)), SSP_TXIM = ((uint32_t)(1 << 3)), SSP_INT_MASK_BITMASK = ((uint32_t)(0xF)) } |
| SSP Type of Interrupt Mask. More... | |
| enum | SSP_MASKINTSTATUS_T { SSP_RORMIS = ((uint32_t)(1 << 0)), SSP_RTMIS = ((uint32_t)(1 << 1)), SSP_RXMIS = ((uint32_t)(1 << 2)), SSP_TXMIS = ((uint32_t)(1 << 3)), SSP_MASK_INT_STAT_BITMASK = ((uint32_t)(0xF)) } |
| SSP Type of Mask Interrupt Status. More... | |
| enum | SSP_RAWINTSTATUS_T { SSP_RORRIS = ((uint32_t)(1 << 0)), SSP_RTRIS = ((uint32_t)(1 << 1)), SSP_RXRIS = ((uint32_t)(1 << 2)), SSP_TXRIS = ((uint32_t)(1 << 3)), SSP_RAW_INT_STAT_BITMASK = ((uint32_t)(0xF)) } |
| SSP Type of Raw Interrupt Status. More... | |
| enum | SSP_INTCLEAR_T { SSP_RORIC = 0x0, SSP_RTIC = 0x1, SSP_INT_CLEAR_BITMASK = 0x3 } |
| enum | SSP_DMA_T { SSP_DMA_RX = (1u), SSP_DMA_TX = (1u << 1), SSP_DMA_BITMASK = ((uint32_t)(0x3)) } |
| enum | CHIP_SSP_CLOCK_MODE_T { SSP_CLOCK_CPHA0_CPOL0 = (0 << 6), SSP_CLOCK_CPHA0_CPOL1 = (1u << 6), SSP_CLOCK_CPHA1_CPOL0 = (2u << 6), SSP_CLOCK_CPHA1_CPOL1 = (3u << 6), SSP_CLOCK_MODE0 = SSP_CLOCK_CPHA0_CPOL0, SSP_CLOCK_MODE1 = SSP_CLOCK_CPHA1_CPOL0, SSP_CLOCK_MODE2 = SSP_CLOCK_CPHA0_CPOL1, SSP_CLOCK_MODE3 = SSP_CLOCK_CPHA1_CPOL1 } |
| enum | CHIP_SSP_FRAME_FORMAT_T { SSP_FRAMEFORMAT_SPI = (0 << 4), CHIP_SSP_FRAME_FORMAT_TI = (1u << 4), SSP_FRAMEFORMAT_MICROWIRE = (2u << 4) } |
| enum | CHIP_SSP_BITS_T { SSP_BITS_4 = (3u << 0), SSP_BITS_5 = (4u << 0), SSP_BITS_6 = (5u << 0), SSP_BITS_7 = (6u << 0), SSP_BITS_8 = (7u << 0), SSP_BITS_9 = (8u << 0), SSP_BITS_10 = (9u << 0), SSP_BITS_11 = (10u << 0), SSP_BITS_12 = (11u << 0), SSP_BITS_13 = (12u << 0), SSP_BITS_14 = (13u << 0), SSP_BITS_15 = (14u << 0), SSP_BITS_16 = (15u << 0) } |
| enum | CHIP_SSP_MODE_T { SSP_MODE_MASTER = (0 << 2), SSP_MODE_SLAVE = (1u << 2) } |
Functions | |
| STATIC INLINE void | Chip_SSP_Enable (LPC_SSP_T *pSSP) |
| Enable SSP operation. More... | |
| STATIC INLINE void | Chip_SSP_Disable (LPC_SSP_T *pSSP) |
| Disable SSP operation. More... | |
| STATIC INLINE void | Chip_SSP_EnableLoopBack (LPC_SSP_T *pSSP) |
| Enable loopback mode. More... | |
| STATIC INLINE void | Chip_SSP_DisableLoopBack (LPC_SSP_T *pSSP) |
| Disable loopback mode. More... | |
| STATIC INLINE FlagStatus | Chip_SSP_GetStatus (LPC_SSP_T *pSSP, SSP_STATUS_T Stat) |
| Get the current status of SSP controller. More... | |
| STATIC INLINE uint32_t | Chip_SSP_GetIntStatus (LPC_SSP_T *pSSP) |
| Get the masked interrupt status. More... | |
| STATIC INLINE IntStatus | Chip_SSP_GetRawIntStatus (LPC_SSP_T *pSSP, SSP_RAWINTSTATUS_T RawInt) |
| Get the raw interrupt status. More... | |
| STATIC INLINE uint8_t | Chip_SSP_GetDataSize (LPC_SSP_T *pSSP) |
| Get the number of bits transferred in each frame. More... | |
| STATIC INLINE void | Chip_SSP_ClearIntPending (LPC_SSP_T *pSSP, SSP_INTCLEAR_T IntClear) |
| Clear the corresponding interrupt condition(s) in the SSP controller. More... | |
| STATIC INLINE void | Chip_SSP_Int_Enable (LPC_SSP_T *pSSP) |
| Enable interrupt for the SSP. More... | |
| STATIC INLINE void | Chip_SSP_Int_Disable (LPC_SSP_T *pSSP) |
| Disable interrupt for the SSP. More... | |
| STATIC INLINE uint16_t | Chip_SSP_ReceiveFrame (LPC_SSP_T *pSSP) |
| Get received SSP data. More... | |
| STATIC INLINE void | Chip_SSP_SendFrame (LPC_SSP_T *pSSP, uint16_t tx_data) |
| Send SSP 16-bit data. More... | |
| void | Chip_SSP_SetClockRate (LPC_SSP_T *pSSP, uint32_t clk_rate, uint32_t prescale) |
| Set up output clocks per bit for SSP bus. More... | |
| STATIC INLINE void | Chip_SSP_SetFormat (LPC_SSP_T *pSSP, uint32_t bits, uint32_t frameFormat, uint32_t clockMode) |
| Set up the SSP frame format. More... | |
| STATIC INLINE void | Chip_SSP_Set_Mode (LPC_SSP_T *pSSP, uint32_t mode) |
| Set the SSP working as master or slave mode. More... | |
| STATIC INLINE void | Chip_SSP_DMA_Enable (LPC_SSP_T *pSSP) |
| Enable DMA for SSP. More... | |
| STATIC INLINE void | Chip_SSP_DMA_Disable (LPC_SSP_T *pSSP) |
| Disable DMA for SSP. More... | |
| void | Chip_SSP_Int_FlushData (LPC_SSP_T *pSSP) |
| Clean all data in RX FIFO of SSP. More... | |
| Status | Chip_SSP_Int_RWFrames8Bits (LPC_SSP_T *pSSP, Chip_SSP_DATA_SETUP_T *xf_setup) |
| SSP Interrupt Read/Write with 8-bit frame width. More... | |
| Status | Chip_SSP_Int_RWFrames16Bits (LPC_SSP_T *pSSP, Chip_SSP_DATA_SETUP_T *xf_setup) |
| SSP Interrupt Read/Write with 16-bit frame width. More... | |
| uint32_t | Chip_SSP_RWFrames_Blocking (LPC_SSP_T *pSSP, Chip_SSP_DATA_SETUP_T *xf_setup) |
| SSP Polling Read/Write in blocking mode. More... | |
| uint32_t | Chip_SSP_WriteFrames_Blocking (LPC_SSP_T *pSSP, const uint8_t *buffer, uint32_t buffer_len) |
| SSP Polling Write in blocking mode. More... | |
| uint32_t | Chip_SSP_ReadFrames_Blocking (LPC_SSP_T *pSSP, uint8_t *buffer, uint32_t buffer_len) |
| SSP Polling Read in blocking mode. More... | |
| void | Chip_SSP_Init (LPC_SSP_T *pSSP) |
| Initialize the SSP. More... | |
| void | Chip_SSP_DeInit (LPC_SSP_T *pSSP) |
| Deinitialise the SSP. More... | |
| void | Chip_SSP_SetMaster (LPC_SSP_T *pSSP, bool master) |
| Set the SSP operating modes, master or slave. More... | |
| void | Chip_SSP_SetBitRate (LPC_SSP_T *pSSP, uint32_t bitRate) |
| Set the clock frequency for SSP interface. More... | |
1.8.3.1