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LPCOpen Platform for LPC18XX/43XX microcontrollers
18XX43XX
LPCOpen Platform for the NXP LPC18XX/43XX family of Microcontrollers
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#include "ring_buffer.h"Go to the source code of this file.
Data Structures | |
| struct | LPC_USART_T |
| USART register block structure. More... | |
Macros | |
| #define | UART_RBR_MASKBIT (0xFF) |
| Macro defines for UART Receive Buffer register. More... | |
| #define | UART_LOAD_DLL(div) ((div) & 0xFF) |
| Macro defines for UART Divisor Latch LSB register. More... | |
| #define | UART_DLL_MASKBIT (0xFF) |
| #define | UART_LOAD_DLM(div) (((div) >> 8) & 0xFF) |
| Macro defines for UART Divisor Latch MSB register. More... | |
| #define | UART_DLM_MASKBIT (0xFF) |
| #define | UART_IER_RBRINT (1 << 0) |
| Macro defines for UART Interrupt Enable Register. More... | |
| #define | UART_IER_THREINT (1 << 1) |
| #define | UART_IER_RLSINT (1 << 2) |
| #define | UART_IER_MSINT (1 << 3) |
| #define | UART_IER_CTSINT (1 << 7) |
| #define | UART_IER_ABEOINT (1 << 8) |
| #define | UART_IER_ABTOINT (1 << 9) |
| #define | UART_IER_BITMASK (0x307) |
| #define | UART1_IER_BITMASK (0x30F) |
| #define | UART2_IER_BITMASK (0x38F) |
| #define | UART_IIR_INTSTAT_PEND (1 << 0) |
| Macro defines for UART Interrupt Identification Register. More... | |
| #define | UART_IIR_FIFO_EN (3 << 6) |
| #define | UART_IIR_ABEO_INT (1 << 8) |
| #define | UART_IIR_ABTO_INT (1 << 9) |
| #define | UART_IIR_BITMASK (0x3CF) |
| #define | UART_IIR_INTID_MASK (7 << 1) |
| #define | UART_IIR_INTID_RLS (3 << 1) |
| #define | UART_IIR_INTID_RDA (2 << 1) |
| #define | UART_IIR_INTID_CTI (6 << 1) |
| #define | UART_IIR_INTID_THRE (1 << 1) |
| #define | UART_IIR_INTID_MODEM (0 << 1) |
| #define | UART_FCR_FIFO_EN (1 << 0) |
| Macro defines for UART FIFO Control Register. More... | |
| #define | UART_FCR_RX_RS (1 << 1) |
| #define | UART_FCR_TX_RS (1 << 2) |
| #define | UART_FCR_DMAMODE_SEL (1 << 3) |
| #define | UART_FCR_BITMASK (0xCF) |
| #define | UART_TX_FIFO_SIZE (16) |
| #define | UART_FCR_TRG_LEV0 (0) |
| #define | UART_FCR_TRG_LEV1 (1 << 6) |
| #define | UART_FCR_TRG_LEV2 (2 << 6) |
| #define | UART_FCR_TRG_LEV3 (3 << 6) |
| #define | UART_LCR_WLEN_MASK (3 << 0) |
| Macro defines for UART Line Control Register. More... | |
| #define | UART_LCR_WLEN5 (0 << 0) |
| #define | UART_LCR_WLEN6 (1 << 0) |
| #define | UART_LCR_WLEN7 (2 << 0) |
| #define | UART_LCR_WLEN8 (3 << 0) |
| #define | UART_LCR_SBS_MASK (1 << 2) |
| #define | UART_LCR_SBS_1BIT (0 << 2) |
| #define | UART_LCR_SBS_2BIT (1 << 2) |
| #define | UART_LCR_PARITY_EN (1 << 3) |
| #define | UART_LCR_PARITY_DIS (0 << 3) |
| #define | UART_LCR_PARITY_ODD (0 << 4) |
| #define | UART_LCR_PARITY_EVEN (1 << 4) |
| #define | UART_LCR_PARITY_F_1 (2 << 4) |
| #define | UART_LCR_PARITY_F_0 (3 << 4) |
| #define | UART_LCR_BREAK_EN (1 << 6) |
| #define | UART_LCR_DLAB_EN (1 << 7) |
| #define | UART_LCR_BITMASK (0xFF) |
| #define | UART_MCR_DTR_CTRL (1 << 0) |
| Macro defines for UART Modem Control Register. More... | |
| #define | UART_MCR_RTS_CTRL (1 << 1) |
| #define | UART_MCR_LOOPB_EN (1 << 4) |
| #define | UART_MCR_AUTO_RTS_EN (1 << 6) |
| #define | UART_MCR_AUTO_CTS_EN (1 << 7) |
| #define | UART_MCR_BITMASK (0xD3) |
| #define | UART_LSR_RDR (1 << 0) |
| Macro defines for UART Line Status Register. More... | |
| #define | UART_LSR_OE (1 << 1) |
| #define | UART_LSR_PE (1 << 2) |
| #define | UART_LSR_FE (1 << 3) |
| #define | UART_LSR_BI (1 << 4) |
| #define | UART_LSR_THRE (1 << 5) |
| #define | UART_LSR_TEMT (1 << 6) |
| #define | UART_LSR_RXFE (1 << 7) |
| #define | UART_LSR_TXFE (1 << 8) |
| #define | UART_LSR_BITMASK (0xFF) |
| #define | UART1_LSR_BITMASK (0x1FF) |
| #define | UART_MSR_DELTA_CTS (1 << 0) |
| Macro defines for UART Modem Status Register. More... | |
| #define | UART_MSR_DELTA_DSR (1 << 1) |
| #define | UART_MSR_LO2HI_RI (1 << 2) |
| #define | UART_MSR_DELTA_DCD (1 << 3) |
| #define | UART_MSR_CTS (1 << 4) |
| #define | UART_MSR_DSR (1 << 5) |
| #define | UART_MSR_RI (1 << 6) |
| #define | UART_MSR_DCD (1 << 7) |
| #define | UART_MSR_BITMASK (0xFF) |
| #define | UART_ACR_START (1 << 0) |
| Macro defines for UART Auto baudrate control register. More... | |
| #define | UART_ACR_MODE (1 << 1) |
| #define | UART_ACR_AUTO_RESTART (1 << 2) |
| #define | UART_ACR_ABEOINT_CLR (1 << 8) |
| #define | UART_ACR_ABTOINT_CLR (1 << 9) |
| #define | UART_ACR_BITMASK (0x307) |
| #define | UART_ACR_MODE0 (0) |
| #define | UART_ACR_MODE1 (1) |
| #define | UART_RS485CTRL_NMM_EN (1 << 0) |
| Macro defines for UART RS485 Control register. More... | |
| #define | UART_RS485CTRL_RX_DIS (1 << 1) |
| #define | UART_RS485CTRL_AADEN (1 << 2) |
| #define | UART_RS485CTRL_SEL_DTR (1 << 3) |
| #define | UART_RS485CTRL_DCTRL_EN (1 << 4) |
| #define | UART_RS485CTRL_OINV_1 (1 << 5) |
| #define | UART_RS485CTRL_BITMASK (0x3F) |
| #define | UART_ICR_IRDAEN (1 << 0) |
| Macro defines for UART IrDA Control Register - valid for 11xx, 17xx/40xx UART0/2/3, 18xx/43xx UART3 only. More... | |
| #define | UART_ICR_IRDAINV (1 << 1) |
| #define | UART_ICR_FIXPULSE_EN (1 << 2) |
| #define | UART_ICR_PULSEDIV(n) ((n & 0x07) << 3) |
| #define | UART_ICR_BITMASK (0x3F) |
| #define | UART_HDEN_HDEN ((1 << 0)) |
| Macro defines for UART half duplex register - ???? More... | |
| #define | UART_SCICTRL_SCIEN (1 << 0) |
| Macro defines for UART Smart card interface Control Register - valid for 11xx, 18xx/43xx UART0/2/3 only. More... | |
| #define | UART_SCICTRL_NACKDIS (1 << 1) |
| #define | UART_SCICTRL_PROTSEL_T1 (1 << 2) |
| #define | UART_SCICTRL_TXRETRY(n) ((n & 0x07) << 5) |
| #define | UART_SCICTRL_GUARDTIME(n) ((n & 0xFF) << 8) |
| #define | UART_FDR_DIVADDVAL(n) (n & 0x0F) |
| Macro defines for UART Fractional Divider Register. More... | |
| #define | UART_FDR_MULVAL(n) ((n << 4) & 0xF0) |
| #define | UART_FDR_BITMASK (0xFF) |
| #define | UART_TER1_TXEN (1 << 7) |
| Macro defines for UART Tx Enable Register. More... | |
| #define | UART_TER2_TXEN (1 << 0) |
| #define | UART_SYNCCTRL_SYNC (1 << 0) |
| Macro defines for UART Synchronous Control Register - 11xx, 18xx/43xx UART0/2/3 only. More... | |
| #define | UART_SYNCCTRL_CSRC_MASTER (1 << 1) |
| #define | UART_SYNCCTRL_FES (1 << 2) |
| #define | UART_SYNCCTRL_TSBYPASS (1 << 3) |
| #define | UART_SYNCCTRL_CSCEN (1 << 4) |
| #define | UART_SYNCCTRL_STARTSTOPDISABLE (1 << 5) |
| #define | UART_SYNCCTRL_CCCLR (1 << 6) |
Functions | |
| STATIC INLINE void | Chip_UART_TXEnable (LPC_USART_T *pUART) |
| Enable transmission on UART TxD pin. More... | |
| STATIC INLINE void | Chip_UART_TXDisable (LPC_USART_T *pUART) |
| Disable transmission on UART TxD pin. More... | |
| STATIC INLINE void | Chip_UART_SendByte (LPC_USART_T *pUART, uint8_t data) |
| Transmit a single data byte through the UART peripheral. More... | |
| STATIC INLINE uint8_t | Chip_UART_ReadByte (LPC_USART_T *pUART) |
| Read a single byte data from the UART peripheral. More... | |
| STATIC INLINE void | Chip_UART_IntEnable (LPC_USART_T *pUART, uint32_t intMask) |
| Enable UART interrupts. More... | |
| STATIC INLINE void | Chip_UART_IntDisable (LPC_USART_T *pUART, uint32_t intMask) |
| Disable UART interrupts. More... | |
| STATIC INLINE uint32_t | Chip_UART_GetIntsEnabled (LPC_USART_T *pUART) |
| Returns UART interrupts that are enabled. More... | |
| STATIC INLINE uint32_t | Chip_UART_ReadIntIDReg (LPC_USART_T *pUART) |
| Read the Interrupt Identification Register (IIR) More... | |
| STATIC INLINE void | Chip_UART_SetupFIFOS (LPC_USART_T *pUART, uint32_t fcr) |
| Setup the UART FIFOs. More... | |
| STATIC INLINE void | Chip_UART_ConfigData (LPC_USART_T *pUART, uint32_t config) |
| Configure data width, parity and stop bits. More... | |
| STATIC INLINE void | Chip_UART_EnableDivisorAccess (LPC_USART_T *pUART) |
| Enable access to Divisor Latches. More... | |
| STATIC INLINE void | Chip_UART_DisableDivisorAccess (LPC_USART_T *pUART) |
| Disable access to Divisor Latches. More... | |
| STATIC INLINE void | Chip_UART_SetDivisorLatches (LPC_USART_T *pUART, uint8_t dll, uint8_t dlm) |
| Set LSB and MSB divisor latch registers. More... | |
| STATIC INLINE uint32_t | Chip_UART_ReadModemControl (LPC_USART_T *pUART) |
| Return modem control register/status. More... | |
| STATIC INLINE void | Chip_UART_SetModemControl (LPC_USART_T *pUART, uint32_t mcr) |
| Set modem control register/status. More... | |
| STATIC INLINE void | Chip_UART_ClearModemControl (LPC_USART_T *pUART, uint32_t mcr) |
| Clear modem control register/status. More... | |
| STATIC INLINE uint32_t | Chip_UART_ReadLineStatus (LPC_USART_T *pUART) |
| Return Line Status register/status (LSR) More... | |
| STATIC INLINE uint32_t | Chip_UART_ReadModemStatus (LPC_USART_T *pUART) |
| Return Modem Status register/status (MSR) More... | |
| STATIC INLINE void | Chip_UART_SetScratch (LPC_USART_T *pUART, uint8_t data) |
| Write a byte to the scratchpad register. More... | |
| STATIC INLINE uint8_t | Chip_UART_ReadScratch (LPC_USART_T *pUART) |
| Returns current byte value in the scratchpad register. More... | |
| STATIC INLINE void | Chip_UART_SetAutoBaudReg (LPC_USART_T *pUART, uint32_t acr) |
| Set autobaud register options. More... | |
| STATIC INLINE void | Chip_UART_ClearAutoBaudReg (LPC_USART_T *pUART, uint32_t acr) |
| Clear autobaud register options. More... | |
| STATIC INLINE void | Chip_UART_SetRS485Flags (LPC_USART_T *pUART, uint32_t ctrl) |
| Set RS485 control register options. More... | |
| STATIC INLINE void | Chip_UART_ClearRS485Flags (LPC_USART_T *pUART, uint32_t ctrl) |
| Clear RS485 control register options. More... | |
| STATIC INLINE void | Chip_UART_SetRS485Addr (LPC_USART_T *pUART, uint8_t addr) |
| Set RS485 address match value. More... | |
| STATIC INLINE uint8_t | Chip_UART_GetRS485Addr (LPC_USART_T *pUART) |
| Read RS485 address match value. More... | |
| STATIC INLINE void | Chip_UART_SetRS485Delay (LPC_USART_T *pUART, uint8_t dly) |
| Set RS485 direction control (RTS or DTR) delay value. More... | |
| STATIC INLINE uint8_t | Chip_UART_GetRS485Delay (LPC_USART_T *pUART) |
| Read RS485 direction control (RTS or DTR) delay value. More... | |
| void | Chip_UART_Init (LPC_USART_T *pUART) |
| Initializes the pUART peripheral. More... | |
| void | Chip_UART_DeInit (LPC_USART_T *pUART) |
| De-initializes the pUART peripheral. More... | |
| FlagStatus | Chip_UART_CheckBusy (LPC_USART_T *pUART) |
| Check whether if UART is busy or not. More... | |
| int | Chip_UART_Send (LPC_USART_T *pUART, const void *data, int numBytes) |
| Transmit a byte array through the UART peripheral (non-blocking) More... | |
| int | Chip_UART_Read (LPC_USART_T *pUART, void *data, int numBytes) |
| Read data through the UART peripheral (non-blocking) More... | |
| uint32_t | Chip_UART_SetBaud (LPC_USART_T *pUART, uint32_t baudrate) |
| Sets best dividers to get a target bit rate (without fractional divider) More... | |
| uint32_t | Chip_UART_SetBaudFDR (LPC_USART_T *pUART, uint32_t baud) |
| Sets best dividers to get a target bit rate (with fractional divider) More... | |
| int | Chip_UART_SendBlocking (LPC_USART_T *pUART, const void *data, int numBytes) |
| Transmit a byte array through the UART peripheral (blocking) More... | |
| int | Chip_UART_ReadBlocking (LPC_USART_T *pUART, void *data, int numBytes) |
| Read data through the UART peripheral (blocking) More... | |
| void | Chip_UART_RXIntHandlerRB (LPC_USART_T *pUART, RINGBUFF_T *pRB) |
| UART receive-only interrupt handler for ring buffers. More... | |
| void | Chip_UART_TXIntHandlerRB (LPC_USART_T *pUART, RINGBUFF_T *pRB) |
| UART transmit-only interrupt handler for ring buffers. More... | |
| uint32_t | Chip_UART_SendRB (LPC_USART_T *pUART, RINGBUFF_T *pRB, const void *data, int bytes) |
| Populate a transmit ring buffer and start UART transmit. More... | |
| int | Chip_UART_ReadRB (LPC_USART_T *pUART, RINGBUFF_T *pRB, void *data, int bytes) |
| Copy data from a receive ring buffer. More... | |
| void | Chip_UART_IRQRBHandler (LPC_USART_T *pUART, RINGBUFF_T *pRXRB, RINGBUFF_T *pTXRB) |
| UART receive/transmit interrupt handler for ring buffers. More... | |
| FlagStatus | Chip_UART_GetABEOStatus (LPC_USART_T *pUART) |
| Returns the Auto Baud status. More... | |
| void | Chip_UART_ABCmd (LPC_USART_T *pUART, uint32_t mode, bool autorestart, FunctionalState NewState) |
| Start/stop autobaud operation. More... | |
1.8.3.1