LPCOpen Platform for LPC18XX/43XX microcontrollers
18XX43XX
LPCOpen Platform for the NXP LPC18XX/43XX family of Microcontrollers
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chip_18xx_43xx
eeprom_18xx_43xx.h
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/*
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* @brief LPC18xx/43xx EEPROM driver
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*
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* @note
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* Copyright(C) NXP Semiconductors, 2012
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* All rights reserved.
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*
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* @par
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* Software that is described herein is for illustrative purposes only
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* which provides customers with programming information regarding the
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* LPC products. This software is supplied "AS IS" without any warranties of
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* any kind, and NXP Semiconductors and its licensor disclaim any and
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* all warranties, express or implied, including all implied warranties of
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* merchantability, fitness for a particular purpose and non-infringement of
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* intellectual property rights. NXP Semiconductors assumes no responsibility
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* or liability for the use of the software, conveys no license or rights under any
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* patent, copyright, mask work right, or any other intellectual property rights in
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* or to any products. NXP Semiconductors reserves the right to make changes
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* in the software without notification. NXP Semiconductors also makes no
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* representation or warranty that such application will be suitable for the
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* specified use without further testing or modification.
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*
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* @par
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* Permission to use, copy, modify, and distribute this software and its
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* documentation is hereby granted, under NXP Semiconductors' and its
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* licensor's relevant copyrights in the software, without fee, provided that it
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* is used in conjunction with NXP Semiconductors microcontrollers. This
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* copyright, permission, and disclaimer notice must appear in all copies of
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* this code.
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*/
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#ifndef _EEPROM_18XX_43XX_H_
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#define _EEPROM_18XX_43XX_H_
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#ifdef __cplusplus
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extern
"C"
{
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#endif
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/* FIX ME: Move to chip.h */
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#define EEPROM_START (0x20040000)
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#define EEPROM_PAGE_SIZE (128)
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#define EEPROM_PAGE_NUM (128)
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#define EEPROM_ADDRESS(page, offset) (EEPROM_START + (EEPROM_PAGE_SIZE * (page)) + offset)
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#define EEPROM_CLOCK_DIV 1500000
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#define EEPROM_READ_WAIT_STATE_VAL 0x58
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#define EEPROM_WAIT_STATE_VAL 0x232
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typedef
struct
{
/* EEPROM Structure */
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__IO uint32_t
CMD
;
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uint32_t
RESERVED0
;
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__IO uint32_t
RWSTATE
;
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__IO uint32_t
AUTOPROG
;
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__IO uint32_t
WSTATE
;
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__IO uint32_t
CLKDIV
;
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__IO uint32_t
PWRDWN
;
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uint32_t RESERVED2[1007];
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__O uint32_t
INTENCLR
;
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__O uint32_t
INTENSET
;
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__I uint32_t
INTSTAT
;
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__I uint32_t
INTEN
;
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__O uint32_t
INTSTATCLR
;
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__O uint32_t
INTSTATSET
;
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}
LPC_EEPROM_T
;
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/*
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* @brief Macro defines for EEPROM command register
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*/
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#define EEPROM_CMD_ERASE_PRG_PAGE (6)
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/*
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* @brief Macro defines for EEPROM Auto Programming register
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*/
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#define EEPROM_AUTOPROG_OFF (0)
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#define EEPROM_AUTOPROG_AFT_1WORDWRITTEN (1)
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#define EEPROM_AUTOPROG_AFT_LASTWORDWRITTEN (2)
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/*
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* @brief Macro defines for EEPROM power down register
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*/
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#define EEPROM_PWRDWN (1 << 0)
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/*
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* @brief Macro defines for EEPROM interrupt related registers
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*/
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#define EEPROM_INT_ENDOFPROG (1 << 2)
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STATIC
INLINE
void
Chip_EEPROM_EnablePowerDown
(
LPC_EEPROM_T
*pEEPROM)
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{
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pEEPROM->
PWRDWN
=
EEPROM_PWRDWN
;
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}
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STATIC
INLINE
void
Chip_EEPROM_DisablePowerDown
(
LPC_EEPROM_T
*pEEPROM)
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{
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pEEPROM->
PWRDWN
= 0;
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}
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void
Chip_EEPROM_Init
(
LPC_EEPROM_T
*pEEPROM);
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STATIC
INLINE
void
Chip_EEPROM_DeInit
(
LPC_EEPROM_T
*pEEPROM)
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{
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/* Enable EEPROM power down mode */
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Chip_EEPROM_EnablePowerDown
(pEEPROM);
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}
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STATIC
INLINE
void
Chip_EEPROM_SetAutoProg
(
LPC_EEPROM_T
*pEEPROM, uint32_t mode)
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{
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pEEPROM->
AUTOPROG
= mode;
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}
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STATIC
INLINE
void
Chip_EEPROM_SetReadWaitState
(
LPC_EEPROM_T
*pEEPROM, uint32_t ws)
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{
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pEEPROM->
RWSTATE
= ws;
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}
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STATIC
INLINE
void
Chip_EEPROM_SetWaitState
(
LPC_EEPROM_T
*pEEPROM, uint32_t ws)
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{
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pEEPROM->
WSTATE
= ws;
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}
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STATIC
INLINE
void
Chip_EEPROM_SetCmd
(
LPC_EEPROM_T
*pEEPROM, uint32_t cmd)
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{
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pEEPROM->
CMD
= cmd;
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}
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void
Chip_EEPROM_EraseProgramPage
(
LPC_EEPROM_T
*pEEPROM);
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void
Chip_EEPROM_WaitForIntStatus
(
LPC_EEPROM_T
*pEEPROM, uint32_t mask);
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STATIC
INLINE
void
Chip_EEPROM_EnableInt
(
LPC_EEPROM_T
*pEEPROM, uint32_t mask)
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{
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pEEPROM->
INTENSET
= mask;
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}
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STATIC
INLINE
void
Chip_EEPROM_DisableInt
(
LPC_EEPROM_T
*pEEPROM, uint32_t mask)
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{
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pEEPROM->
INTENCLR
= mask;
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}
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STATIC
INLINE
uint32_t
Chip_EEPROM_GetIntEnable
(
LPC_EEPROM_T
*pEEPROM)
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{
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return
pEEPROM->
INTEN
;
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}
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STATIC
INLINE
uint32_t
Chip_EEPROM_GetIntStatus
(
LPC_EEPROM_T
*pEEPROM)
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{
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return
pEEPROM->
INTSTAT
;
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}
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STATIC
INLINE
void
Chip_EEPROM_SetIntStatus
(
LPC_EEPROM_T
*pEEPROM, uint32_t mask)
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{
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pEEPROM->
INTSTATSET
= mask;
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}
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STATIC
INLINE
void
Chip_EEPROM_ClearIntStatus
(
LPC_EEPROM_T
*pEEPROM, uint32_t mask)
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{
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pEEPROM->
INTSTATCLR
= mask;
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}
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#ifdef __cplusplus
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}
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#endif
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#endif
/* _EEPROM_18XX_43XX_H_ */
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